公开(公告)号：US20160037106A1

公开(公告)日：2016-02-04

申请号：US14806876

申请日：2015-07-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro OHMARU

IPC: H04N5/369 ,  H04N5/378 ,  H04N7/18

CPC classification number: H04N5/3698 ,  H04N5/23241 ,  H04N5/32 ,  H04N5/332 ,  H04N5/369 ,  H04N5/378

Abstract: An imaging device includes a pixel; a digital circuit; and an analog processing circuit including a constant current circuit, a current comparison circuit, and a control circuit. The pixel is capable of outputting differential data. The constant current circuit is capable of supplying a first current corresponding to the differential data, in accordance with a first control signal. The current comparison circuit is capable of supplying a second current that flows through the constant current circuit in accordance with a change in the differential data. The current comparison circuit has a function of setting a determination signal active depending on whether to supply the second current to the constant current circuit. The control circuit has a function of controlling the constant current circuit and the current comparison circuit to stop their functions as the determination signal becomes active. The digital circuit operates as the determination signal becomes active.

Abstract translation: 成像装置包括像素; 数字电路; 以及包括恒流电路，电流比较电路和控制电路的模拟处理电路。 该像素能够输出差分数据。 恒流电路能够根据第一控制信号提供与差分数据相对应的第一电流。 电流比较电路能够根据差分数据的变化提供流过恒流电路的第二电流。 电流比较电路具有根据是否向恒流电路提供第二电流来设定确定信号有效的功能。 控制电路具有控制恒流电路和电流比较电路的功能，以便在确定信号变为有效时停止其功能。 当确定信号变为有效时，数字电路工作。

公开(公告)号：US20150363136A1

公开(公告)日：2015-12-17

申请号：US14731940

申请日：2015-06-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Wataru UESUGI ,  Tomoaki ATSUMI ,  Naoaki TSUTSUI ,  Hikaru TAMURA ,  Takahiko ISHIZU ,  Takuro OHMARU

IPC: G06F3/06 ,  G06F11/14

CPC classification number: G06F12/00 ,  G11C5/00 ,  H01L27/0688 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7782

Abstract: A semiconductor device including a register controller and a processor which includes a register is provided. The register includes a first circuit and a second circuit which includes a plurality of memory portions. The first circuit and the plurality of memory portions can store data by an arithmetic process of the processor. Which of the plurality of memory portions the data is stored in depends on a routine by which the data is processed. The register controller switches the routine in response to an interrupt signal. The register controller can make any one of the plurality of memory portions which corresponds to the routine store the data in the first circuit every time the routine is switched. The register controller can make data stored in any one of the plurality of memory portions which corresponds to the routine be stored in the first circuit every time the routine is switched.

Abstract translation: 提供一种包括寄存器控制器和包括寄存器的处理器的半导体器件。 寄存器包括第一电路和包括多个存储器部分的第二电路。 第一电路和多个存储器部分可以通过处理器的算术处理来存储数据。 存储数据的多个存储器部分中的哪一个取决于数据被处理的程序。 寄存器控制器响应中断信号切换程序。 寄存器控制器可以使每次该例程的多个存储器部分中的任何一个存储在第一电路中。 寄存器控制器可以在每次该例程被切换时使存储在与该程序相对应的多个存储器部分中的任何一个存储器中的数据存储在第一电路中。

公开(公告)号：US20150348609A1

公开(公告)日：2015-12-03

申请号：US14723613

申请日：2015-05-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro OHMARU

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4076

CPC classification number: G11C11/406 ,  G11C5/147 ,  G11C11/401 ,  G11C11/404 ,  G11C11/4074 ,  G11C11/4076 ,  G11C29/24 ,  G11C29/42 ,  G11C29/50016

Abstract: To provide a novel semiconductor device. The semiconductor device includes a circuit including a memory cell including a transistor using an oxide semiconductor; and a refresh timing determination unit including a capacitor, a transistor using an oxide semiconductor, and a comparator circuit. The potential of a floating node in the refresh timing determination unit is directly or indirectly input to the comparator circuit and compared with a reference potential. When the potential of the floating node becomes a certain value, a power switch operating in accordance with an output of the comparator circuit is turned on, power is supplied to the circuit including the memory cell, and then the reference potential is also changed. After that, refresh operation of the memory cell is performed. When the refresh operation is finished, the power switch is turned off.

Abstract translation: 提供一种新型的半导体器件。 该半导体器件包括：包括具有使用氧化物半导体的晶体管的存储单元的电路; 以及包括电容器，使用氧化物半导体的晶体管和比较器电路的刷新定时确定单元。 刷新定时确定单元中的浮动节点的电位直接或间接地输入到比较器电路并与参考电位进行比较。 当浮动节点的电位变为特定值时，根据比较器电路的输出操作的电源开关导通，向包括存储单元的电路供电，然后参考电位也改变。 之后，执行存储单元的刷新操作。 刷新操作完成后，电源开关关闭。

公开(公告)号：US20220077205A1

公开(公告)日：2022-03-10

申请号：US17517705

申请日：2021-11-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA ,  Hiroki INOUE ,  Takuro OHMARU

IPC: H01L27/146 ,  H01L21/8234 ,  H04N5/225 ,  H01L27/12 ,  H01L27/088 ,  H01L29/786 ,  H01L31/075

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

公开(公告)号：US20210314517A1

公开(公告)日：2021-10-07

申请号：US17236267

申请日：2021-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro OHMARU ,  Naoto KUSUMOTO ,  Kentaro HAYASHI

IPC: H04N5/3745 ,  H01L27/146 ,  H04N5/232 ,  H04N5/347 ,  H04N5/369

Abstract: An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.

公开(公告)号：US20210051291A1

公开(公告)日：2021-02-18

申请号：US17087760

申请日：2020-11-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takuro OHMARU ,  Naoto KUSUMOTO

IPC: H04N5/3745 ,  H01L31/0272

Abstract: An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A node AN (a first charge retention portion), a node FD (a second charge retention portion), and a node FDX (the charge detection portion) are provided. Imaging data obtained in the node AN is transferred to the node FD, and the imaging data is sequentially transferred from the node FD to the node FDX to be read.

公开(公告)号：US20170092670A1

公开(公告)日：2017-03-30

申请号：US15311261

申请日：2015-05-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA ,  Hiroki INOUE ,  Takuro OHMARU

IPC: H01L27/146 ,  H01L29/786 ,  H04N5/225 ,  H01L31/075

CPC classification number: H01L27/14603 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/146 ,  H01L27/1461 ,  H01L27/14616 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14692 ,  H01L29/7869 ,  H01L31/075 ,  H04N5/2253

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

公开(公告)号：US20160381266A1

公开(公告)日：2016-12-29

申请号：US15183885

申请日：2016-06-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro OHMARU

IPC: H04N5/225 ,  H01L27/146 ,  G06T7/00 ,  H04N5/378 ,  H04N5/369 ,  H01L29/786 ,  H04N5/374

CPC classification number: H04N5/3698 ,  G06T7/13 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/14689 ,  H01L29/7869 ,  H04N5/23245 ,  H04N5/3696 ,  H04N5/374 ,  H04N5/378

Abstract: Provided is an imaging device operated at high speed and low power consumption. The imaging device includes a pixel and a first circuit. The pixel includes a first photoelectric conversion element and a second photoelectric conversion element. The first circuit is configured to compare a first signal which is output from the pixel on the basis of imaging data obtained by the first photosensitive conversion element to a second signal which is output from the pixel on the basis of imaging data obtained by the second photosensitive conversion element for determining whether there is a difference between the first signal and the second signal. Thus, edge detection can be performed without a periphery device for edge detection outside the imaging device.

Abstract translation: 提供了以高速和低功耗操作的成像装置。 成像装置包括像素和第一电路。 像素包括第一光电转换元件和第二光电转换元件。 第一电路被配置为将基于由第一光敏转换元件获得的成像数据的从像素输出的第一信号与基于由第二光敏器件获得的成像数据从像素输出的第二信号进行比较 转换元件，用于确定第一信号和第二信号之间是否存在差异。 因此，可以在成像装置外部没有用于边缘检测的周边装置的情况下执行边缘检测。

公开(公告)号：US20160293655A1

公开(公告)日：2016-10-06

申请号：US15083755

申请日：2016-03-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi YONEDA ,  Takuro OHMARU ,  Yuki OKAMOTO

IPC: H01L27/146 ,  H01L31/0272 ,  H01L29/786

CPC classification number: H01L27/14643 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14636 ,  H01L27/14641 ,  H01L27/14665 ,  H01L29/7869 ,  H01L31/02005 ,  H01L31/022408 ,  H01L31/0272 ,  H01L31/107

Abstract: To provide an imaging device capable of high-speed reading. The imaging device includes a photodiode, a first transistor, a second transistor, a third transistor, and a fourth transistor. The back gate electrode of the first transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor. The back gate electrode of the second transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the second transistor. The back gate electrode of the third transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.

Abstract translation: 提供能够进行高速读取的成像装置。 成像装置包括光电二极管，第一晶体管，第二晶体管，第三晶体管和第四晶体管。 第一晶体管的背栅电极电连接到可以提供高于第一晶体管的源极电位的电位和低于第一晶体管的源极电位的电位的布线。 第二晶体管的背栅极电连接到可以提供高于第二晶体管的源极电位的电位的布线。 第三晶体管的背栅电极电连接到可以提供高于第三晶体管的源极电位的电位和低于第三晶体管的源极电位的电位的布线。

公开(公告)号：US20140042496A1

公开(公告)日：2014-02-13

申请号：US14060020

申请日：2013-10-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro OHMARU ,  Yutaka SHIONOIRI

IPC: H01L27/105

CPC classification number: H01L27/105 ,  H03K19/1776 ,  H03K19/17764 ,  H03K19/17772

Abstract: A programmable analog device in which data can be held even when supply of a power supply potential is stopped. The programmable circuit includes unit cells connected in parallel or in series, and each of the unit cells includes an analog element. A conduction state of each of the unit cells is changed between an on state and an off state. Each of the unit cells includes, as a switch of the unit cell, a first transistor having a sufficiently low off-state current and a second transistor, a gate electrode of the second transistor being electrically connected to a source or drain electrode of the first transistor. The conduction state of the unit cell is controlled with a potential of the gate electrode of the second transistor, which can be kept even when no power is supplied thanks to the low off-state current of the first transistor.

Abstract translation: 即使停止供给电源电位，也可以进行数据保持的可编程模拟装置。 可编程电路包括并联或串联连接的单位单元，并且每个单位单元包括模拟元件。 每个单电池的导通状态在导通状态和断开状态之间变化。 每个单电池包括作为单位电池的开关的具有足够低的截止电流的第一晶体管和第二晶体管，第二晶体管的栅电极电连接到第一晶体管的源电极或漏电极 晶体管。 单电池的导通状态由第二晶体管的栅电极的电位来控制，即使在没有供电的情况下，由于第一晶体管的低截止电流也可以保持该电位。