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公开(公告)号:US20220157271A1
公开(公告)日:2022-05-19
申请号:US17529315
申请日:2021-11-18
Applicant: Sharp Kabushiki Kaisha
Inventor: Koji MURATA , Hidefumi YOSHIDA
IPC: G09G3/36 , G02F1/1362 , G02F1/1337 , G02F1/1343 , G02F1/137
Abstract: Provided is a liquid crystal display device including: a liquid crystal panel including display units for displaying an image using a veil-view function; and a control circuit. The display units each include a pair of sub-pixels including a first sub-pixel and a second sub-pixel. The liquid crystal panel sequentially includes an active matrix substrate, a first alignment film, a liquid crystal layer containing liquid crystal molecules, a second alignment film, and a counter substrate. The active matrix substrate includes first and second electrodes that are stacked via a first insulating layer or that face each other on the first substrate. At least one of the first or second electrode is disposed for each first sub-pixel and for each second sub-pixel. The counter substrate includes a third electrode. The control circuit is configured to switch between application of alternating voltage and application of constant voltage to the third electrode.
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公开(公告)号:US20200021788A1
公开(公告)日:2020-01-16
申请号:US16509660
申请日:2019-07-12
Applicant: Sharp Kabushiki Kaisha
Inventor: Hidefumi YOSHIDA
Abstract: [Object] To provide technology that enables the characteristics of a display device to be appropriately evaluated.[Solution] Values Xn, Yn, and Zn are set based on tristimulus values obtained by measuring, by the optical measuring device, a first display state where white is displayed to fill a screen of the display device. Tristimulus values obtained by measuring a second display state by the optical measuring device are set as values X, Y, and Z. In the second display state, a color including at least one of red, green, blue, white, and black is displayed in at least part of the screen of the display device. Values L*, a*, and b* are calculated by transforming the values Xn, Yn, and Zn and the values X, Y, and Z. A color volume of a color space formed from the values L*, a*, and b* is calculated. The value Yn in the first display state and the color volume are output.
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公开(公告)号:US20190302815A1
公开(公告)日:2019-10-03
申请号:US16444105
申请日:2019-06-18
Applicant: Sharp Kabushiki Kaisha
Inventor: Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC: G05F1/46 , H01L27/12 , H03K17/042 , H03K17/16 , H03K17/687 , G02F1/1362 , G02F1/1333 , G02F1/1335 , G02F1/1368 , G02F1/1345 , G09G3/36
Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号:US20180143486A1
公开(公告)日:2018-05-24
申请号:US15577032
申请日:2016-05-20
Applicant: Sharp Kabushiki Kaisha
Inventor: Shinya KADOWAKI , Hidefumi YOSHIDA , Ryuzo YUKI
IPC: G02F1/1335 , G02F1/1339 , G09F9/30
CPC classification number: G02F1/133512 , G02F1/133 , G02F1/1333 , G02F1/1335 , G02F1/133514 , G02F1/1339 , G02F2201/56 , G09F9/30 , G09G3/36 , G09G2300/0426
Abstract: A method of driving a display device including a display panel that includes a color filter board is provided. The color filter board includes a light blocking section formed in a grid and color sections that are formed in areas surrounded by a pattern of the light blocking section in different colors from area to area. The color sections form display pixels on a combination basis. The display panel includes a light blocking area in at least a section of an edge along an outline of the display pane. The method includes setting the color sections that do not form the display pixels among the color sections adjacent to the light blocking area in a plan view of the display panel constantly in the black state.
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15.
公开(公告)号:US20160178964A1
公开(公告)日:2016-06-23
申请号:US14909545
申请日:2014-07-24
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Akira SAKAI , Masahiro HASEGAWA , Hiroyuki HAKOI , Hidefumi YOSHIDA , Shigeaki MIZUSHIMA
CPC classification number: G02F1/133536 , G02B5/3016 , G02B5/3083 , G02B27/145 , G02B27/286 , G02F2001/133557 , G02F2001/133562 , G02F2001/133638 , G06T3/60 , G06T11/001 , G06T11/40 , G09G3/3406 , G09G3/36 , G09G3/3611 , G09G2340/04
Abstract: The present invention provides a mirror display that sufficiently prevents a decrease in the screen luminance in the display mode while sufficiently increasing the reflectance in the mirror mode, and also gives excellent production efficiency. The mirror display includes a half mirror plate including at least two half mirror layers; and a display device arranged on the backside of the half mirror plate, the display device including a polarizer, the at least two half mirror layers including at least one reflective polarizer, the transmission axis of the polarizer and the transmission axis of the at least one reflective polarizer being substantially parallel to each other or substantially perpendicular to each other, the mirror display configured to switch a display mode allowing display light to be emitted from the display device and to pass through the half mirror plate and a mirror mode preventing display light from being emitted from the display device, the mirror display exhibiting a sum of the transmittance in the display mode and the reflectance in the mirror mode of 100% or higher.
Abstract translation: 本发明提供了一种能够充分防止在显示模式下降低屏幕亮度的反射镜显示器,同时充分提高了镜面模式下的反射率,并且还提供了优异的生产效率。 所述镜子显示器包括:半反射镜板,其包括至少两个半镜层; 以及布置在所述半反射镜板的背面上的显示装置,所述显示装置包括偏振器,所述至少两个半镜层包括至少一个反射偏振器,所述偏振器的透射轴和所述至少一个的透射轴 反射偏振器基本上彼此平行或基本上彼此垂直,所述反射镜显示器被配置为切换显示模式,允许显示光从所述显示装置发射并穿过所述半透半反镜板,并且镜模式防止显示光 从显示装置发射的显示模式下的透射率和反射镜的反射率之和为100%以上的镜面显示装置。
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16.
公开(公告)号:US20130189626A1
公开(公告)日:2013-07-25
申请号:US13788702
申请日:2013-03-07
Applicant: Sharp Kabushiki Kaisha
Inventor: Hideo CHIDA , Hidefumi YOSHIDA , Yasutoshi TASAKA
IPC: G03F7/22
CPC classification number: G03F7/22 , G02F1/1303 , G02F1/133723 , G02F1/133788 , G02F2201/086 , Y10T428/1018 , Y10T428/1023
Abstract: A liquid crystal display device includes a pair of substrates, a liquid crystal between substrates and alignment layers disposed on the inner surface sides of the substrates. The alignment layer is made from a material including polyamic acid containing a diamine component and polyimide containing a diamine component different from the diamine component of the polyamic acid. The alignment layer is subjected to alignment treatment by irradiation of light. UV light can be irradiated in the oblique direction onto the alignment layer through a mask having openings. A reflecting plate can be arranged between a UV light source and the mask. Also, bank structures having a thickness from 0.1 to 0.15 μm can be provided on the alignment layer of the TFT substrate.
Abstract translation: 液晶显示装置包括一对基板,基板之间的液晶和设置在基板的内表面侧上的取向层。 取向层由含有二胺成分的聚酰胺酸和含有与聚酰胺酸的二胺成分不同的二胺成分的聚酰亚胺构成。 对准层通过照射光进行取向处理。 UV光可以通过具有开口的掩模在倾斜方向上照射到取向层上。 反射板可以布置在UV光源和掩模之间。 此外,可以在TFT基板的取向层上设置厚度为0.1〜0.15μm的堤结构。
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公开(公告)号:US20220171226A1
公开(公告)日:2022-06-02
申请号:US17536330
申请日:2021-11-29
Applicant: Sharp Kabushiki Kaisha
Inventor: Koji MURATA , Hidefumi YOSHIDA
IPC: G02F1/1368 , G02F1/1343
Abstract: Provided is a liquid crystal display device including: an active matrix substrate including a first substrate, and a first electrode and a second electrode that are stacked via a first insulating layer or that face each other on the first substrate, the second electrode being disposed for each sub-pixel; and a counter substrate sequentially including a second substrate, a third electrode including linear electrode portions, a second insulating layer, and a fourth electrode including linear electrode portions, an extending direction of the linear electrode portions of the third electrode intersecting an extending direction of the linear electrode portions of the fourth electrode in a plan view; and a control circuit being configured to switch between application of an alternating voltage and application of a constant voltage to the third electrode and/or the fourth electrode.
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公开(公告)号:US20170301706A1
公开(公告)日:2017-10-19
申请号:US15513173
申请日:2015-12-02
Applicant: Sharp Kabushiki Kaisha
Inventor: Shinya KADOWAKI , Hidefumi YOSHIDA
IPC: H01L27/12
CPC classification number: H01L27/1288 , G02F1/1362 , G02F2001/136231 , G02F2201/56 , G03F7/0007 , G03F7/203 , G09F9/00 , H01L27/127 , H01L51/50 , H05B33/08 , H05B33/10
Abstract: A method of manufacturing a display panel substrate having a semiconductor element includes a film forming step of forming a thin film, a resist film forming step of forming a positive resist film on the thin film, a first exposure step of selectively exposing a resist film via a photomask including a pattern of the semiconductor element, a second exposure step of selectively exposing the resist film by scanning and irradiating the resist film with light along an outline shape of the display panel substrate, a developing step of developing the resist film to remove the resist film exposed in the first and second exposure steps and form a resist pattern on the thin film, an etching step of etching the thin film using the resist pattern as a mask, and forming a thin-film pattern by selectively removing the thin film, and a peeling step of peeling the resist pattern.
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公开(公告)号:US20170269441A1
公开(公告)日:2017-09-21
申请号:US15506580
申请日:2015-08-19
Applicant: Sharp Kabushiki Kaisha
Inventor: Mitsuhiro MURATA , Yosuke IWATA , Satoshi MATSUMURA , Hidefumi YOSHIDA
IPC: G02F1/1343 , G02F1/1368
CPC classification number: G02F1/134363 , G02F1/133707 , G02F1/13439 , G02F1/1368 , G02F2001/134372 , G02F2001/134381 , G02F2201/123
Abstract: The present invention provides a liquid crystal display device that can improve the response speed from OFF state to ON state. The present invention includes a first substrate, a second substrate, a horizontal-alignment type liquid crystal layer between the first and second substrates, and pixels. The first substrate includes a planar first opposite electrode, a plurality of first pixel electrodes each having a linear shape and arranged parallel to one another in the pixels, and a first insulating layer between the first
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公开(公告)号:US20170235180A1
公开(公告)日:2017-08-17
申请号:US15501505
申请日:2015-07-29
Applicant: Sharp Kabushiki Kaisha
Inventor: Satoshi MATSUMURA , Mitsuhiro MURATA , Yosuke IWATA , Hidefumi YOSHIDA
IPC: G02F1/1343 , G02F1/1333 , G02F1/1337
CPC classification number: G02F1/13439 , G02F1/133345 , G02F1/1337 , G02F1/133707 , G02F1/134309 , G02F1/134363 , G02F1/1368 , G02F2001/133738 , G02F2001/134372
Abstract: Provided is a liquid crystal display device that employs a horizontal alignment mode providing wide viewing angles and is capable of achieving high-speed response and high transmittance. The liquid crystal display device includes a pair of substrates with fringe electric field structures and a liquid crystal layer interposed between the paired substrates. Each fringe electric field structure includes a planar electrode, a slit electrode, and an insulating film interposed between the planar electrode and the slit electrode. The liquid crystal layer includes liquid crystal molecules that align horizontally to the substrate surfaces of the paired substrates with no voltage applied. The liquid crystal molecules in the vicinity of the respective substrates are configured to rotate in the same direction from the alignment azimuth with no voltage applied when voltage is applied to each of the fringe electric field structures.
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