公开(公告)号：US20050219109A1

公开(公告)日：2005-10-06

申请号：US11067946

申请日：2005-03-01

申请人： Shigeto Kobayashi ,  Atsushi Wada

发明人： Shigeto Kobayashi ,  Atsushi Wada

IPC分类号： H03M1/14 ,  H03M1/12 ,  H03M1/16 ,  H03M1/18

CPC分类号： H03M1/186 ,  H03M1/167

摘要： The present invention provides a technique for reducing power consumption of an A/D converting device. An A/D converting device according to the present invention includes: multiple comparators each of which has a function for comparing input analog signals with a predetermined reference voltage; an A/D converter for converting the input analog signal into the digital signal with a predetermined number of bits using comparison results from the multiple comparators; a determining unit for determining which range the voltage of the input analog signal belongs to before the comparators comparing the input analog signal with the reference voltages; and a control unit for controlling power supply for the multiple comparators corresponding to the range determined by the determining unit. Thus, power is supplied only to the comparators necessary for this particular A/D conversion, thereby reducing power consumption.

摘要翻译： 本发明提供一种用于降低A / D转换装置的功耗的技术。 根据本发明的A / D转换装置包括：多个比较器，每个比较器具有将输入模拟信号与预定参考电压进行比较的功能; A / D转换器，用于使用来自多个比较器的比较结果将输入的模拟信号转换成具有预定位数的数字信号; 确定单元，用于在比较器将输入模拟信号与参考电压进行比较之前确定输入模拟信号的电压属于哪个范围; 以及控制单元，用于控制对应于由确定单元确定的范围的多个比较器的电源。 因此，仅向该特定A / D转换所需的比较器供电，从而降低功耗。

公开(公告)号：US20050190095A1

公开(公告)日：2005-09-01

申请号：US11061668

申请日：2005-02-22

申请人： Atsushi Wada ,  Kuniyuki Tani ,  Shigeto Kobayashi

发明人： Atsushi Wada ,  Kuniyuki Tani ,  Shigeto Kobayashi

IPC分类号： H03M1/12 ,  H03M1/16 ,  H03M1/34 ,  H03M1/40 ,  H03M1/44

CPC分类号： H03M1/34 ,  H03M1/162 ,  H03M1/167 ,  H03M1/40 ,  H03M1/44

摘要： The present invention provides a widely general-purpose A/D converting device. The A/D converting device comprises multiple signal conversion units each of which include: an A/D converter for converting an input analog signal into a digital signal with a predetermined number of bits; a D/A converter for converting the output from the A/D converter into an analog signal; a subtracter for subtracting the output signal from the D/A converter, from the input analog signal; and an amplifier for amplifying the output signal from the subtracter. The A/D converting device has a configuration wherein the signal conversion units are arrayed in multiple rows and columns. This allows the user to realize an A/D converting device having various types and levels of performance by making various combinations of the signal conversion units without change of the layout of the signal conversion units.

摘要翻译： 本发明提供广泛通用的A / D转换装置。 A / D转换装置包括多个信号转换单元，每个信号转换单元包括：A / D转换器，用于将输入的模拟信号转换成具有预定位数的数字信号; 用于将来自A / D转换器的输出转换为模拟信号的D / A转换器; 用于从输入模拟信号中减去D / A转换器的输出信号的减法器; 以及用于放大来自减法器的输出信号的放大器。 A / D转换装置具有其中信号转换单元以多行和列排列的配置。 这允许用户通过进行信号转换单元的各种组合而不改变信号转换单元的布局来实现具有各种类型和级别的性能的A / D转换装置。

公开(公告)号：US20050068220A1

公开(公告)日：2005-03-31

申请号：US10950569

申请日：2004-09-28

申请人： Atsushi Wada ,  Shigeto Kobayashi ,  Kuniyuki Tani

发明人： Atsushi Wada ,  Shigeto Kobayashi ,  Kuniyuki Tani

IPC分类号： H03M1/44 ,  H03M1/14 ,  H03M1/16 ,  H03M1/34 ,  H03M1/60

CPC分类号： H03M1/167 ,  H03M1/162

摘要： An AD converter capable of achieving both an improved processing speed and a reduced circuit area in good balance. The AD converter pipelines analog-to-digital conversion by using a two-stage configuration consisting of a first conversion unit, or the prior stage, and a second conversion unit, or the subsequent stage. The first conversion unit is a conversion unit of noncyclic type. The second conversion unit is a conversion unit of cyclic type. The second conversion unit is given a conversion processing speed higher than that of the first conversion unit so that the second conversion unit performs cyclic processing twice while the first conversion unit performs conversion processing once.

摘要翻译： AD转换器能够以良好的平衡实现提高的处理速度和减小的电路面积。 AD转换器通过使用由第一转换单元或前一级以及第二转换单元或后续级组成的两级配置来管线模数转换。 第一转换单元是非循环型转换单元。 第二转换单元是循环型转换单元。 给予第二转换单元的转换处理速度高于第一转换单元的转换处理速度，使得第二转换单元在第一转换单元执行转换处理一次的同时进行两次循环处理。

公开(公告)号：US20080218266A1

公开(公告)日：2008-09-11

申请号：US12073610

申请日：2008-03-07

申请人： Shigeto Kobayashi ,  Atsushi Wada

发明人： Shigeto Kobayashi ,  Atsushi Wada

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/45928 ,  H03F2203/45101 ,  H03F2203/45551 ,  H03F2203/45586

摘要： Sampling capacitors are connected respectively to a pair of differential input terminals of an operational amplifier. The sampling capacitors sample input signals. Source terminals and drain terminals of dummy switches are connected respectively to paths connecting the operational amplifier and the sampling capacitors, so that a common-mode voltage of differential input voltages to the operational amplifier is adjusted by gate-channel capacitances.

摘要翻译： 采样电容器分别连接到运算放大器的一对差分输入端子。 采样电容器采样输入信号。 虚拟开关的源极端子和漏极端子分别连接到连接运算放大器和采样电容器的路径，从而通过栅极沟道电容来调整运算放大器的差分输入电压的共模电压。

公开(公告)号：US20070109174A1

公开(公告)日：2007-05-17

申请号：US11651018

申请日：2007-01-09

申请人： Shigeto Kobayashi ,  Atsushi Wada ,  Kuniyuki Tani

发明人： Shigeto Kobayashi ,  Atsushi Wada ,  Kuniyuki Tani

IPC分类号： H03M1/12

CPC分类号： H03M1/1225 ,  H03M1/167

摘要： One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.

摘要翻译： 一个或多个输入电容器连接到运算放大器的反相输入端。 连接到各个输入电容器的开关用于对输入信号的输入进行开关控制，用于开关控制另一个输入信号的输入，用于开关控制更高参考电压的输入，以及 用于开关控制较低参考电压的输入。 用于对输入信号的输入的开关控制的开关和用于另一个输入信号的输入的开关控制的开关由独立的控制信号控制。

公开(公告)号：US20050219111A1

公开(公告)日：2005-10-06

申请号：US11073720

申请日：2005-03-08

申请人： Shigeto Kobayashi ,  Atsushi Wada ,  Kuniyuki Tani

发明人： Shigeto Kobayashi ,  Atsushi Wada ,  Kuniyuki Tani

IPC分类号： H03M1/14 ,  H03F3/70 ,  H03M1/00 ,  H03M1/12 ,  H03M1/16

CPC分类号： H03M1/1225 ,  H03M1/167

摘要： One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.

摘要翻译： 一个或多个输入电容器连接到运算放大器的反相输入端。 连接到各个输入电容器的开关用于对输入信号的输入进行开关控制，用于开关控制另一个输入信号的输入，用于开关控制更高参考电压的输入，以及 用于开关控制较低参考电压的输入。 用于对输入信号的输入的开关控制的开关和用于另一个输入信号的输入的开关控制的开关由独立的控制信号控制。

公开(公告)号：US20120249119A1

公开(公告)日：2012-10-04

申请号：US13436406

申请日：2012-03-30

申请人： Atsushi Wada ,  Shigeto Kobayashi

发明人： Atsushi Wada ,  Shigeto Kobayashi

IPC分类号： G01N27/00

CPC分类号： G06F13/4081 ,  Y02D10/14 ,  Y02D10/151

摘要： A power supply detecting circuit detects feeding of power to a power supply terminal from the outside. A control unit identifies an accessory device connected to the connector based on a detection result acquired by the identification terminal voltage detecting circuit and a detection result acquired by the power supply detecting circuit. The identification terminal voltage detecting circuit can narrow down accessory device candidates based on whether or not there is feeding of power detected by the power supply detecting circuit.

摘要翻译： 电源检测电路检测从外部向电源端子供电。 控制单元基于由识别终端电压检测电路获取的检测结果和由电源检测电路获取的检测结果来识别连接到连接器的附件装置。 识别终端电压检测电路可以基于是否存在由电源检测电路检测到的电力的馈送来缩小辅助设备候选。

公开(公告)号：US08223058B2

公开(公告)日：2012-07-17

申请号：US12825744

申请日：2010-06-29

申请人： Shigeto Kobayashi ,  Atsushi Wada ,  Toru Dan

发明人： Shigeto Kobayashi ,  Atsushi Wada ,  Toru Dan

IPC分类号： H03M1/12

CPC分类号： H03M1/0607 ,  H01G4/38 ,  H03M1/0682 ,  H03M1/0695 ,  H03M1/167 ,  H03M1/802

摘要： A capacitor array circuit receives a plurality of input signals, generate a single output signal by combining the plurality of input signals, and output the single output signal. A comparator receives the output signal of the capacitor array circuit. A current source, which is disposed between a predetermined fixed voltage source and an output terminal of the switched-capacitor circuit, supplies the current to the output terminal until the output signal of the comparator changes. A plurality of input capacitors in the capacitor array circuit receives a plurality of input signals in parallel with each other. At least one additional regulating capacitor in the capacitor array circuit store the charge to compensate for an offset component caused by the delay in the comparator. The respective output terminals of the plurality of input capacitors and the at least one additional regulating capacitor are combined into one.

摘要翻译： 电容器阵列电路接收多个输入信号，通过组合多个输入信号产生单个输出信号，并输出单个输出信号。 比较器接收电容器阵列电路的输出信号。 设置在预定的固定电压源和开关电容电路的输出端之间的电流源将电流提供给输出端，直到比较器的输出信号变化。 电容器阵列电路中的多个输入电容器彼此并行地接收多个输入信号。 电容器阵列电路中的至少一个附加的调节电容器存储电荷以补偿由比较器的延迟引起的偏移分量。 多个输入电容器和至少一个附加调节电容器的各个输出端子组合成一个。

公开(公告)号：US07525383B2

公开(公告)日：2009-04-28

申请号：US11902557

申请日：2007-09-24

申请人： Shigeto Kobayashi ,  Atsushi Wada

发明人： Shigeto Kobayashi ,  Atsushi Wada

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F1/26 ,  H03F3/45475 ,  H03F2200/372 ,  H03F2203/45508 ,  H03F2203/45534 ,  H03F2203/45726 ,  H03M1/0881 ,  H03M1/167

摘要： Connected to a differential transistor pair are a load current source and a tail current source. A bias circuit controls current generated by the load current source. A first self-bias switch is provided between a gate and a drain of a first input transistor; and a second self-bias switch is provided between a gate and a drain of a second input transistor, where the first input transistor and the second input transistor constitute the differential transistors pair. An external bias switch is provided between the bias circuit and the load current source.

摘要翻译： 连接到差分晶体管对的是负载电流源和尾电流源。 偏置电路控制负载电流源产生的电流。 第一自偏压开关设置在第一输入晶体管的栅极和漏极之间; 并且第二自偏压开关设置在第二输入晶体管的栅极和漏极之间，其中第一输入晶体管和第二输入晶体管构成差分晶体管对。 在偏置电路和负载电流源之间提供外部偏置开关。

公开(公告)号：US07158068B2

公开(公告)日：2007-01-02

申请号：US11067946

申请日：2005-03-01

申请人： Shigeto Kobayashi ,  Atsushi Wada

发明人： Shigeto Kobayashi ,  Atsushi Wada

IPC分类号： H03M1/12

CPC分类号： H03M1/186 ,  H03M1/167

摘要： The present invention provides a technique for reducing power consumption of an A/D converting device. An A/D converting device according to the present invention includes: multiple comparators each of which has a function for comparing input analog signals with a predetermined reference voltage; an A/D converter for converting the input analog signal into the digital signal with a predetermined number of bits using comparison results from the multiple comparators; a determining unit for determining which range the voltage of the input analog signal belongs to before the comparators comparing the input analog signal with the reference voltages; and a control unit for controlling power supply for the multiple comparators corresponding to the range determined by the determining unit. Thus, power is supplied only to the comparators necessary for this particular A/D conversion, thereby reducing power consumption.