公开(公告)号：US20150370298A1

公开(公告)日：2015-12-24

申请号：US14313817

申请日：2014-06-24

Applicant: Stephan Henzler ,  David Herbison

Inventor： Stephan Henzler ,  David Herbison

IPC: G06F1/26 ,  G06F13/42

CPC classification number: G06F13/4221 ,  G06F1/26 ,  G06F13/4027

Abstract: Described is an apparatus which comprises: a plurality of bridges which are operable to drive respective signals for one or more power supply rails; a plurality of controllers; and a main controller to couple one or more controllers from the plurality of controllers to one or more bridges from the plurality of bridges.

Abstract translation: 描述了一种装置，其包括：多个桥，其可操作以驱动用于一个或多个电源轨的相应信号; 多个控制器; 以及主控制器，用于将来自所述多个控制器的一个或多个控制器耦合到来自所述多个桥的一个或多个桥。

公开(公告)号：US20140266822A1

公开(公告)日：2014-09-18

申请号：US13833256

申请日：2013-03-15

Applicant: Stephan Henzler ,  Markus Schimper

Inventor： Stephan Henzler ,  Markus Schimper

IPC: H03M1/82

CPC classification number: H03M1/82 ,  G04F10/005 ,  H03M1/1014

Abstract: A digital-to-time converter (DTC) comprises a gate controller configured to generate a gate enable signal based on first and second digital values so that the gate enable signal has a first enable period and a second enable period for each pair of a first digital value and a second digital value. A gate conditionally passes a main clock signal to a gate output in response to the gate enable signal, the gate thus providing a gated signal at a gate output. A frequency divider generates a frequency divided signal as the output signal of the digital-to-time converter based on the gated signal. The DTC may be calibrated by a time-to-digital converter connected between an input for the main clock signal and an output of a delay element of the DTC.

Abstract translation: 数字到时间转换器（DTC）包括门控制器，其被配置为基于第一数字值和第二数字值产生栅极使能信号，使得栅极使能信号具有用于每对第一数字值的第一使能周期和第二使能周期 数字值和第二数字值。 栅极响应于栅极使能信号有条件地将主时钟信号传递到栅极输出，因此栅极在栅极输出端提供门控信号。 分频器基于门控信号产生分频信号作为数/模转换器的输出信号。 DTC可以通过连接在主时钟信号的输入端和DTC的延迟元件的输出之间的时间 - 数字转换器进行校准。

公开(公告)号：US20130063100A1

公开(公告)日：2013-03-14

申请号：US13231482

申请日：2011-09-13

Applicant: Stephan Henzler

Inventor： Stephan Henzler

IPC: G05F1/46

CPC classification number: H02M3/156 ,  H02M2001/0032 ,  Y02B70/16

Abstract: A DC/DC converter includes a switch mode converter for providing an output voltage based on an input voltage and a drive signal generator configured to to provide a drive signal for the switch mode converter. The drive signal generator is configured to switch between a non-pulse-skipping mode and a pulse-skipping mode. Moreover, the drive signal generator is configured to adapt a setting of a pulse generation such that a length of a first pulse following a pulse skipping is larger than a minimum length of a pulse in the non-pulse-skipping mode.

Abstract translation: DC / DC转换器包括用于基于输入电压提供输出电压的开关模式转换器和被配置为提供用于开关模式转换器的驱动信号的驱动信号发生器。 驱动信号发生器被配置为在非脉冲跳过模式和脉冲跳过模式之间切换。 此外，驱动信号发生器被配置为适应脉冲发生的设置，使得脉冲跳跃之后的第一脉冲的长度大于非脉冲跳过模式中的脉冲的最小长度。

公开(公告)号：US20120268184A1

公开(公告)日：2012-10-25

申请号：US13535422

申请日：2012-06-28

Applicant: Thomas Baumann ,  Christian Pacha ,  Stephan Henzler ,  Peter Huber

Inventor： Thomas Baumann ,  Christian Pacha ,  Stephan Henzler ,  Peter Huber

IPC: H03H11/26

CPC classification number: H03L7/0814 ,  H03K5/135 ,  H03K2005/00058

Abstract: The present disclosure relates to on-chip self calibrating delay monitoring circuitry.

Abstract translation: 本公开涉及片上自校准延迟监测电路。

公开(公告)号：US20120044102A1

公开(公告)日：2012-02-23

申请号：US13287788

申请日：2011-11-02

Applicant: Stephan Henzler

Inventor： Stephan Henzler

IPC: H03M1/10

CPC classification number: G04F10/005 ,  H03M1/10

Abstract: Apparatuses and methods related to time-to-digital converters (TDCs) are herein described. Generally, a time-to-digital converter is a device which measures a time period or time interval and outputs a digital value representing the measured time period. In an implementation, an apparatus is provided comprising a time-to-digital converter circuit, which further comprises a built-in self test (BIST). The built-in self test may be implemented using one or more oscillators coupled to the time-to-digital converter via one or more multiplexer devices.

Abstract translation: 这里描述与时间 - 数字转换器（TDC）相关的装置和方法。 通常，时间 - 数字转换器是测量时间段或时间间隔并输出表示测量时间段的数字值的装置。 在实现中，提供了一种包括时间 - 数字转换器电路的装置，其还包括内置自检（BIST）。 可以使用经由一个或多个多路复用器装置耦合到时间 - 数字转换器的一个或多个振荡器来实现内置自检。

公开(公告)号：US20110309814A1

公开(公告)日：2011-12-22

申请号：US12820259

申请日：2010-06-22

Applicant: Joerg Berthold ,  Peter Mahrla ,  Stephan Henzler ,  Vincent Gouin ,  Fan He

Inventor： Joerg Berthold ,  Peter Mahrla ,  Stephan Henzler ,  Vincent Gouin ,  Fan He

IPC: G05F3/02

CPC classification number: G05F1/46 ,  Y10T307/391 ,  Y10T307/658

Abstract: One embodiment relates to an apparatus that includes at least one circuit block and a voltage source configured to supply a first voltage to the at least one circuit block. The apparatus also includes a power delivery unit configured to be selectively activated based on a whether a quantity of power is to be delivered from the power delivery unit to the circuit block. A control unit is configured to, upon a change in power consumption of the at least one circuit block, activate the auxiliary power delivery unit to deliver the quantity of power to the circuit block. The auxiliary power delivery unit can quickly supply large currents since it does not necessarily rely on slow control loops using voltage sensing. Rather, the auxiliary power delivery unit often delivers pre-calculated current profiles to respond to the timing characteristic of the change of power consumption and of the voltage regulator.

Abstract translation: 一个实施例涉及一种装置，其包括至少一个电路块和被配置为向至少一个电路块提供第一电压的电压源。 该装置还包括配置为基于是否将从电力传送单元传送到电路块的功率量来选择性地激活的电力输送单元。 控制单元被配置为在所述至少一个电路块的功率消耗的改变时激活辅助功率传递单元以将功率量传送到所述电路块。 辅助电力输送单元可以快速提供大电流，因为它不一定依赖于使用电压感测的慢速控制回路。 相反，辅助电力输送单元通常递送预先计算的电流曲线以响应功率变化和电压调节器的定时特性。

公开(公告)号：US08064561B2

公开(公告)日：2011-11-22

申请号：US11856046

申请日：2007-09-16

Applicant: Stephan Henzler

Inventor： Stephan Henzler

IPC: H04L7/00

CPC classification number: G01R31/31709 ,  G04F10/005

Abstract: An apparatus including a circuit configured to determine a jitter of a first signal, and to determine a time interval between a feature in a second signal and a feature in the first signal based on the determined jitter.

Abstract translation: 一种装置，包括被配置为基于所确定的抖动来确定第一信号的抖动并且确定第二信号中的特征与第一信号中的特征之间的时间间隔的电路。

公开(公告)号：US08018366B2

公开(公告)日：2011-09-13

申请号：US12615994

申请日：2009-11-10

Applicant: Stephan Henzler ,  Matthias Schobinger ,  Lajos Gazsi

Inventor： Stephan Henzler ,  Matthias Schobinger ,  Lajos Gazsi

IPC: H03M1/12

CPC classification number: H03M1/125 ,  H03M1/504

Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).

Abstract translation: 公开了电路和系统的示例性实施方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。

公开(公告)号：US07696829B2

公开(公告)日：2010-04-13

申请号：US11524674

申请日：2006-09-21

Applicant: Stephan Henzler ,  Siegmar Köppe

Inventor： Stephan Henzler ,  Siegmar Köppe

IPC: H03L7/093 ,  H03C3/06

CPC classification number: H03L7/0991 ,  H03L7/08 ,  H03L7/18 ,  H03L2207/50

Abstract: A synthesizer arrangement includes an oscillator, a phase detector, and a loop filter that form a phase-locked loop. The loop filter is coupled to a control unit to activate a respective set of internal states out of a plurality of sets of internal states.

Abstract translation: 合成器装置包括形成锁相环的振荡器，相位检测器和环路滤波器。 环路滤波器耦合到控制单元以激活多组内部状态中的相应的一组内部状态。

公开(公告)号：US20100066435A1

公开(公告)日：2010-03-18

申请号：US12388412

申请日：2009-02-18

Applicant: Domagoj Siprak ,  Marc Tiebout ,  Stephan Henzler

Inventor： Domagoj Siprak ,  Marc Tiebout ,  Stephan Henzler

IPC: G11C5/14

CPC classification number: H03K19/00315 ,  H01L21/761 ,  H01L29/7833 ,  H03K2217/0018

Abstract: The present disclosure relates to constructing and operating a transistor or other active device with significantly reduced flicker noise.

Abstract translation: 本公开涉及构造和操作具有显着降低的闪烁噪声的晶体管或其它有源器件。