Abstract:
A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.
Abstract:
A method and system for providing a data service in interworking wireless public and private networks, allows for data service data being transmitted through the private network when a data service is to be transmitted through the private network within the network where the wireless public network and the wired/wireless private network are interworked. A method of providing a data service in interworking wireless public and private networks, includes transmitting, by a user, a data service request signal; determining, by the private network, based on identifier information through which of the private and public networks to transmit the data service; transmitting a private network data service call to a private content server when it is determined based on the identifier information that it is the private network data service call; and transmitting a public network data service call to a public network content server when it is determined based on the identifier information that it is the public network data service call. Consequently, there is an advantage that a packet data service can be forwarded through any one selected from the public network and the private network. Further, there is another advantage that a data service is available through the private network by modifying the system without changing each user terminal, and thus an additional cost is hardly caused.
Abstract:
An apparatus for effectively filtering and separating fine floc, algae, suspended solids, etc. remaining in water after biological and physiochemical treatment is provided. The fine filtering apparatus includes flexible fibers that control packing density, thus improving filtration efficiency, the amount of clarified water, and filtering duration, and reducing power consumption compared to a conventional filtering apparatus is provided. In the filtering apparatus, flexible fibers having an effective diameter of 1 to 60 μm and which are flexible, elastic, and have proper surface roughness extend in the longitudinal direction of the apparatus. A jacket shaped unit for supplying source water (supplied water) has a porous structure. Clarified water (treated water) is discharged through a central porous chamber. The whole filter media layer can be utilized as a particle-entrapping space.
Abstract:
A ferromagnetic graphene includes at least one antidot such that the ferromagnetic graphene has ferromagnetic characteristics. A spin valve device includes a ferromagnetic graphene. The ferromagnetic graphene includes a first region, a second region, and a third region. At least one antidot is formed in each of the first region and the third region. The first region and the third region are ferromagnetic regions, whereas the second region is a non-ferromagnetic region.
Abstract:
Disclosed are a spin transistor and a method of operating the spin transistor. The disclosed spin transistor includes a channel formed of a magnetic material selectively passing a spin-polarized electron having a specific direction, a source formed of a magnetic material, a drain, and a gate electrode. When a predetermined voltage is applied to the gate electrode, the channel selectively passes a spin-polarized electron having a specific direction and thus, the spin transistor is selectively turned on.
Abstract:
Provided are a memory device, a method of manufacturing the same, and a method of operating the same. The memory device may include a channel region having an upper end where both sides of the upper end are curved, the curved portions of both sides allowing charges to be injected thereinto in a program or erase voltage such that the curved portions into which the charges are injected are separate from a portion which determines a threshold voltage, and a gate structure on the channel region.
Abstract:
A fuel cell separator, a fuel cell stack having the fuel cell separator, and a reactant gas control method of the fuel cell stack are provided. That is, even when the fuel cell stack operates under the low load operation condition, a reactant gas is supplied to the reactant gas passages of the fuel cell separator, and thus, the length of the passage can be shortened by 50% as compared with the prior art having only one reactant gas passage. Therefore, the reactant gas can be effectively supplied without experiencing pressure loss. Further, in the high load operation of the fuel cell stack, the reactant gas is introduced into the first reactant gas passage of the fuel cell separator and utilized in half of the whole electrode area. Subsequently, the reactant gas is introduced into the second reactant gas passage and utilized in the remaining half of the electrode area. The flow rate of the reactant gas flowing along the passage channels is increased by two times, even when the reactant gas utilizing rate is identical as compared with the reactant gas flow in the low load operation. As a result, the moisture existing in the passage channels can be more effectively discharged and the flooding phenomenon occurring in the high load operation can be prevented. By controlling the reactant gas supply in accordance with an operation condition of the fuel cell stack without experiencing pressure loss and deterioration of the utilizing rate, the flooding phenomenon and concentration polarization phenomenon that occur in the fuel cell stack can be prevented.
Abstract:
A white organic light emitting device (OLED) includes an anode, a first phosphorescent layer including a first host material and a first dopant disposed on the anode, a blue fluorescence layer including a blue host material and a blue dopant disposed on the first phosphorescent layer, and a second phosphorescent layer including a second host material and a second dopant disposed on the blue fluorescence layer. In addition, a triplet energy of the blue host material of the blue fluorescence layer is greater than both of a triplet energy of the first dopant of the first phosphorescent layer and a triplet energy of the second dopant of the second phosphorescent layer.
Abstract:
Provided are a memory device, a method of manufacturing the same, and a method of operating the same. The memory device may include a channel region having an upper end where both sides of the upper end are curved, the curved portions of both sides allowing charges to be injected thereinto in a program or erase voltage such that the curved portions into which the charges are injected are separate from a portion which determines a threshold voltage, and a gate structure on the channel region.
Abstract:
A resistance variable memory device includes: a first electrode; a second electrode; a resistance variable layer interposed between the first electrode and the second electrode; and nano particles that are disposed in the resistance variable layer and have a lower dielectric constant than the resistance variable layer.