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公开(公告)号:US10170429B2
公开(公告)日:2019-01-01
申请号:US15431802
申请日:2017-02-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Heng-Chi Huang , Chien-Chen Li , Kuo-Lung Li , Cheng-Liang Cho , Che-Jung Chu , Kuo-Chio Liu
IPC: H01L25/065 , H01L25/00 , H01L21/56 , H01L23/31 , H01L23/538 , H01L23/00 , H01L21/68 , H01L21/683
Abstract: Package structures and methods for forming the same are provided. A package structure includes a package component including a first bump. The package structure also includes an intermetallic compound (IMC) on the first bump. The package structure further includes an integrated circuit die including a second bump on the IMC. The integrated circuit die and the package component are bonded together through the first bump and the second bump. The IMC extends from the first bump to the second bump to provide good physical and electrical connections between the first bump and the second bump.
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公开(公告)号:US20230395461A1
公开(公告)日:2023-12-07
申请号:US17833208
申请日:2022-06-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wen-Yi Lin , Kuang-Chun Lee , Chien-Chen Li , Chien-Li Kuo , Kuo-Chio Liu
IPC: H01L23/427 , H01L25/065 , H01L21/48 , H01L23/498
CPC classification number: H01L23/4275 , H01L25/0655 , H01L21/4882 , H01L23/49833 , H01L2924/35121 , H01L2924/3511 , H01L2924/1611 , H01L2924/1616 , H01L2924/16235 , H01L2924/16251 , H01L2924/1632 , H01L2924/1659 , H01L2924/165 , H01L24/73
Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a package component with one or more integrated circuits adhered to a package substrate, a hybrid thermal interface material utilizing a combination of polymer based material with high elongation values and metal based material with high thermal conductivity values. The polymer based thermal interface material placed on the edge of the package component contains the metal based thermal interface material in liquid form.
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公开(公告)号:US20220399325A1
公开(公告)日:2022-12-15
申请号:US17874492
申请日:2022-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yi-Jen Lai , Chung-Yi Lin , Hsi-Kuei Cheng , Chen-Shien Chen , Kuo-Chio Liu
Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
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公开(公告)号:US10535554B2
公开(公告)日:2020-01-14
申请号:US15725558
申请日:2017-10-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Sheng Tang , Fu-Chen Chang , Cheng-Lin Huang , Chun-Yen Lo , Wen-Ming Chen , Kuo-Chio Liu
IPC: H01L23/495 , H01L23/522 , H01L21/304 , H01L21/56 , H01L21/768 , H01L21/683 , H01L21/67 , H01L23/00 , H01L23/48 , H01L21/78 , H01L23/498 , H01L25/10 , H01L23/58 , H01L25/065 , H01L25/00
Abstract: A method for sawing a semiconductor wafer is provided. The method includes sawing a semiconductor wafer to form a first opening. In addition, the semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape by a die attach film (DAF), and the first opening is formed in an upper portion of the substrate. The method further includes sawing through the substrate and the DAF of the semiconductor wafer from the first opening to form a middle opening under the first opening and a second opening under the middle opening, so that the semiconductor wafer is divided into two dies. In addition, a slope of a sidewall of the middle opening is different from slopes of sidewalls of the first opening and the second opening.
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公开(公告)号:US20230411307A1
公开(公告)日:2023-12-21
申请号:US17841275
申请日:2022-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wen-Yi Lin , Kuang-Chun Lee , Chien-Chen Li , Chien-Li Kuo , Kuo-Chio Liu
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L21/48 , H01L21/56
CPC classification number: H01L23/562 , H01L23/3185 , H01L23/49822 , H01L21/4853 , H01L21/4857 , H01L21/563
Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a large package component, such as a CoWoS, adhered to a large package substrate, such as a printed circuit board, an underfill material disposed between the large package component and the large package substrate, and a stress-release structure with high elongation values formed from photolithography encapsulated by the underfill material. The stress-release structure helping to reduce stress in the underfill material to reduce the risk of underfill cracking caused by the difference in coefficients of thermal expansion between the large package component and the large package substrate.
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公开(公告)号:US20230377905A1
公开(公告)日:2023-11-23
申请号:US17751234
申请日:2022-05-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chien-Li Kuo , Chien-Chen Li , Kuo-Chio Liu , Kuang-Chun Lee , Wen-Yi Lin
IPC: H01L21/48 , H01L23/48 , H01L23/31 , H01L23/498 , H01L23/538 , H01L23/00
CPC classification number: H01L21/486 , H01L23/481 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5389 , H01L24/19 , H01L24/73 , H01L2224/04105 , H01L2224/12105 , H01L2924/15311 , H01L2224/73267
Abstract: In an embodiment, a device includes: an integrated circuit die including a die connector; a first through via adjacent the integrated circuit die; an encapsulant encapsulating the first through via and the integrated circuit die; and a redistribution structure on the encapsulant, the redistribution structure including a redistribution line, the redistribution line physically and electrically coupled to the die connector of the integrated circuit die, the redistribution line electrically isolated from the first through via, the redistribution line crossing over the first through via.
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公开(公告)号:US11088108B2
公开(公告)日:2021-08-10
申请号:US16454350
申请日:2019-06-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sheng-Yao Yang , Ling-Wei Li , Yu-Jui Wu , Cheng-Lin Huang , Chien-Chen Li , Lieh-Chuan Chen , Che-Jung Chu , Kuo-Chio Liu
IPC: H01L21/48 , H01L23/00 , H01L21/768
Abstract: A method for forming a chip package structure is provided. The method includes forming a first conductive bump and a first ring-like structure over a chip. The first ring-like structure surrounds the first conductive bump, the first ring-like structure and the first conductive bump are made of a same first material, the chip includes an interconnect structure, and the first ring-like structure is electrically insulated from the interconnect structure and the first conductive bump. The method includes bonding the chip to a substrate through the first conductive bump.
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公开(公告)号:US10573573B2
公开(公告)日:2020-02-25
申请号:US15925790
申请日:2018-03-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sheng-Huan Chiu , Chun-Jen Chen , Chen-Shien Chen , Kuo-Chio Liu , Kuo-Hui Chang , Chung-Yi Lin , Hsi-Kuei Cheng , Yi-Jen Lai
IPC: H01L23/31 , H01L25/065 , H01L25/07 , H01L25/11 , H01L21/56 , H01L23/00 , H01L25/075
Abstract: A package includes a die, a plurality of first conductive structures, a plurality of second conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns or conical frustums. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures. The redistribution structure is over the active surface of the die and the encapsulant. The redistribution structure is electrically connected to the die, the first conductive structures, and the second conductive structures.
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公开(公告)号:US10546845B2
公开(公告)日:2020-01-28
申请号:US15957914
申请日:2018-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Dong-Han Shen , Chen-Shien Chen , Kuo-Chio Liu , Hsi-Kuei Cheng , Yi-Jen Lai
IPC: H01L23/00 , H01L23/31 , H01L23/538 , H01L25/065 , H01L25/10 , H01L25/18
Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
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公开(公告)号:US20190326264A1
公开(公告)日:2019-10-24
申请号:US15957914
申请日:2018-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Dong-Han Shen , Chen-Shien Chen , Kuo-Chio Liu , Hsi-Kuei Cheng , Yi-Jen Lai
IPC: H01L25/10 , H01L23/00 , H01L23/31 , H01L25/18 , H01L23/538
Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
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