公开(公告)号：US20220231169A1

公开(公告)日：2022-07-21

申请号：US17657770

申请日：2022-04-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Hao Yeh ,  Fu-Ting Yen

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/66 ,  H01L21/324

Abstract: A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, removing a portion of the fin adjacent the dummy gate structure to form a first recess, depositing a stressor material in the first recess, removing at least a portion of the stressor material from the first recess, and after removing the at least a portion of the stressor material, epitaxially growing a source/drain region in the first recess.

公开(公告)号：US20220020644A1

公开(公告)日：2022-01-20

申请号：US17143698

申请日：2021-01-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Yu LIN ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Tzer-Min Shen ,  Fu-Ting Yen ,  Gary Chan ,  Keng-Chu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L21/8234 ,  H01L21/3065

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a first channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The process of performing the oxygen-free cyclic etching process can include performing a first etching process to selectively etch the dielectric layer over the channel layer of the second portion of the fin structure with a first etching selectivity, and performing a second etching process to selectively etch the dielectric layer over the channel layer of the second portion of fin structure with a second etching selectivity greater than the first etching selectivity

公开(公告)号：US20210225654A1

公开(公告)日：2021-07-22

申请号：US17203306

申请日：2021-03-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yasutoshi Okuno ,  Teng-Chun Tsai ,  Ziwei Fang ,  Fu-Ting Yen

IPC: H01L21/28 ,  H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L29/51 ,  H01L21/8238

Abstract: A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.

公开(公告)号：US12288722B2

公开(公告)日：2025-04-29

申请号：US18149130

申请日：2023-01-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Yu Lin ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Tzer-Min Shen ,  Fu-Ting Yen ,  Gary Chan ,  Keng-Chu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L21/8234 ,  H01L21/3065 ,  H01L29/66 ,  H01L29/786

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.

公开(公告)号：US11915936B2

公开(公告)日：2024-02-27

申请号：US18152952

申请日：2023-01-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Wei Su ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Teng-Chun Tsai

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/3205 ,  H01L21/32

CPC classification number: H01L21/28088 ,  H01L21/0206 ,  H01L21/0228 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/28079 ,  H01L21/28556 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/321 ,  H01L21/32051 ,  H01L21/32135 ,  H01L29/6656 ,  H01L21/32 ,  H01L29/66795

Abstract: A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.

公开(公告)号：US11557483B2

公开(公告)日：2023-01-17

申请号：US17333639

申请日：2021-05-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Wei Su ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Teng-Chun Tsai

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/3205 ,  H01L21/32

Abstract: A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

公开(公告)号：US11545397B2

公开(公告)日：2023-01-03

申请号：US17143698

申请日：2021-01-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Yu Lin ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Tzer-Min Shen ,  Fu-Ting Yen ,  Gary Chan ,  Keng-Chu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L21/8234 ,  H01L21/3065

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.

公开(公告)号：US20210083091A1

公开(公告)日：2021-03-18

申请号：US16572679

申请日：2019-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US20240387240A1

公开(公告)日：2024-11-21

申请号：US18785410

申请日：2024-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L21/762 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US20240136438A1

公开(公告)日：2024-04-25

申请号：US18395058

申请日：2023-12-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/0217 ,  H01L21/02203 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L21/823468

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.