公开(公告)号：US10770354B2

公开(公告)日：2020-09-08

申请号：US15813742

申请日：2017-11-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/49 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/417 ,  H01L29/78 ,  H01L29/51

Abstract: Various examples of an integrated circuit with a sidewall spacer and a technique for forming an integrated circuit with such a spacer are disclosed herein. In some examples, the method includes receiving a workpiece that includes a substrate and a gate stack disposed upon the substrate. A spacer is formed on a side surface of the gate stack that includes a spacer layer with a low-k dielectric material. A source/drain region is formed in the substrate; and a source/drain contact is formed coupled to the source/drain region such that the spacer layer of the spacer is disposed between the source/drain contact and the gate stack.

公开(公告)号：US20200098641A1

公开(公告)日：2020-03-26

申请号：US16698336

申请日：2019-11-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Chia-Lin Hsu

IPC: H01L21/8234 ,  H01L29/423 ,  H01L29/20 ,  H01L21/28 ,  H01L21/02 ,  H01L21/283 ,  H01L29/51 ,  H01L29/06 ,  H01L23/532 ,  H01L29/49 ,  H01L29/78 ,  H01L21/321 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/092

Abstract: A method of forming a semiconductor device includes forming a gate dielectric layer on a substrate; forming a barrier layer over the gate dielectric layer; treating the barrier layer to roughen an outer surface of the barrier layer, resulting in a treated barrier layer; and forming a metal layer over the treated barrier layer.

公开(公告)号：US20190067117A1

公开(公告)日：2019-02-28

申请号：US16101667

申请日：2018-08-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Chia-Lin Hsu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L21/02 ,  H01L21/283 ,  H01L29/423 ,  H01L29/20 ,  H01L29/51 ,  H01L29/49 ,  H01L23/532 ,  H01L29/06

Abstract: A method of forming a semiconductor device includes forming a gate dielectric layer on a substrate; forming a barrier layer over the gate dielectric layer; treating the barrier layer to roughen an outer surface of the barrier layer, resulting in a treated barrier layer; and forming a metal layer over the treated barrier layer.

公开(公告)号：US10049940B1

公开(公告)日：2018-08-14

申请号：US15800164

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Chia-Lin Hsu

IPC: H01L29/51 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/20 ,  H01L21/28 ,  H01L21/02 ,  H01L21/283 ,  H01L29/06 ,  H01L23/532 ,  H01L29/49

Abstract: A method of forming a semiconductor device includes receiving a structure having a substrate, a gate trench over the substrate, and a dielectric layer over the substrate and surrounding the gate trench. The method further includes forming a gate dielectric layer in the gate trench, forming a barrier layer in the gate trench and over the gate dielectric layer, and treating the barrier layer to roughen an outer surface of the barrier layer, resulting in a treated barrier layer. The method further includes forming an n-type work function metal layer over the treated barrier layer.

公开(公告)号：US20240395902A1

公开(公告)日：2024-11-28

申请号：US18791056

申请日：2024-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Chih Lin ,  Yen-Ting Chen ,  Wen-Kai Lin ,  Szu-Chi Yang ,  Shih-Hao Lin ,  Tsung-Hung Lee ,  Ming-Lung Cheng

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/78

Abstract: In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.

公开(公告)号：US20240371648A1

公开(公告)日：2024-11-07

申请号：US18773292

申请日：2024-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hao KUNG ,  Hui-Chi HUANG ,  Kei-Wei CHEN ,  Yen-Ting Chen

IPC: H01L21/306 ,  B24B37/24 ,  H01L21/321

Abstract: Provided herein are polishing pads in which microcapsules that include a polymer material and are dispersed, as well as methods of making and using the same. Such microcapsules are configured to break open (e.g., when the polishing pad is damaged during the dressing process), which releases the polymer material. When contacted with ultraviolet light the polymer material at least partially cures, healing the damage to the polishing pad. Such polishing pads have a longer lifetime and a more stable remove rate when compared to standard polishing pads.

公开(公告)号：US20240347616A1

公开(公告)日：2024-10-17

申请号：US18661969

申请日：2024-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Hsiu Liu ,  Feng-Cheng Yang ,  Tsung-Lin Lee ,  Wei-Yang Lee ,  Yen-Ming Chen ,  Yen-Ting Chen

IPC: H01L29/51 ,  H01L21/311 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L29/515 ,  H01L21/311 ,  H01L27/0886 ,  H01L29/6653

Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.

公开(公告)号：US11984489B2

公开(公告)日：2024-05-14

申请号：US17991560

申请日：2022-11-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Hsiu Liu ,  Feng-Cheng Yang ,  Tsung-Lin Lee ,  Wei-Yang Lee ,  Yen-Ming Chen ,  Yen-Ting Chen

IPC: H01L29/51 ,  H01L21/311 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L29/515 ,  H01L21/311 ,  H01L27/0886 ,  H01L29/6653

Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.

公开(公告)号：US20240153993A1

公开(公告)日：2024-05-09

申请号：US18415281

申请日：2024-01-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Po-Shao Lin ,  Wei-Yang Lee

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0673 ,  H01L21/823418 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/0843 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7851

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

公开(公告)号：US11901410B2

公开(公告)日：2024-02-13

申请号：US17462350

申请日：2021-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chen ,  Po-Shao Lin ,  Wei-Yang Lee

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L29/0673 ,  H01L21/823418 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/0843 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7851

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.