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    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    11.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220069012A1

    公开(公告)日：2022-03-03

    申请号：US17241071

    申请日：2021-04-27

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chien-Min Lee ,  Tung-Ying Lee ,  Cheng-Hsien Wu ,  Xinyu BAO ,  Hengyuan Lee ,  Ying-Yu Chen

    IPC分类号： H01L27/24 ,  H01L45/00

    摘要： A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
    12.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 审中-公开

    公开(公告)号：US20240284682A1

    公开(公告)日：2024-08-22

    申请号：US18171283

    申请日：2023-02-17

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Hengyuan Lee ,  Xinyu BAO

    IPC分类号： H10B63/00

    CPC分类号： H10B63/34 ,  H10B63/84

    摘要： A semiconductor device includes a first conductive line, a second conductive line, a third conductive line, a first semiconductor layer, a memory layer and a conductive layer. The first conductive line and the second conductive line extend along a first direction. The third conductive line extends along a second direction substantially perpendicular to the first direction. The first semiconductor layer extends along the second direction to surround the third conductive line. The memory layer is disposed between the first semiconductor layer and the second conductive line. The conductive layer is disposed between the memory layer and the first semiconductor layer.

    MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUIT
    13.
    发明公开
    MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUIT 审中-公开

    公开(公告)号：US20240144999A1

    公开(公告)日：2024-05-02

    申请号：US18163297

    申请日：2023-02-02

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Hengyuan Lee ,  Yu-Sheng Chen ,  Xinyu BAO

    IPC分类号： G11C13/00

    CPC分类号： G11C13/004 ,  G11C2013/0054 ,  G11C2213/72

    摘要： A memory circuit and a method for reading a memory circuit are provided. The memory circuit includes reference memory cells and operation memory cells. The method includes reading a selected reference memory cell at a first time to get a first voltage; reading the selected reference memory cell at a second time after the first time to get a second voltage; adjusting a read voltage of the memory cell to be an adjusted read voltage of the memory cell according to the voltage difference between the first voltage and the second voltage; applying the adjusted read voltage on a selected operation memory cell corresponding to the selected reference memory cell; and applying the adjusted read voltage on other selected operation memory cells in a same row of the memory array corresponding to the selected reference memory cell. The time difference between the first time and the second time is within a range smaller than a predetermined time difference according to characteristics of a corresponding selector in the selected reference memory cell or the selected operation memory cell.

    MEMORY DEVICE
    18.
    发明公开
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20230422518A1

    公开(公告)日：2023-12-28

    申请号：US18152122

    申请日：2023-01-09

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Elia Ambrosi ,  Xinyu BAO ,  Cheng-Hsien Wu

    IPC分类号： H10B63/00 ,  H10B61/00

    CPC分类号： H10B63/24 ,  H10B61/10

    摘要： A memory device is provided. The memory device includes memory cells. Each of the memory cells includes: a resistance variable storage device; and a selector. The selector is stacked with the resistance variable storage device and coupled to the resistance variable storage device with a shared terminal, and includes a switching layer formed of a chalcogenide compound. A thickness of the switching layer is equal to or less than about 5 nm.

    MEMORY DEVICE
    20.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20230071950A1

    公开(公告)日：2023-03-09

    申请号：US17981469

    申请日：2022-11-06

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chien-Min Lee ,  Ming-Yuan Song ,  Yen-Lin Huang ,  Shy-Jay Lin ,  Tung-Ying Lee ,  Xinyu BAO

    IPC分类号： H01L27/22 ,  H01L43/04 ,  H01L43/06 ,  G11C11/18 ,  G11C11/16 ,  H01L43/14

    摘要： Provided are a memory device and a method of forming the same. The memory device includes: a selector; a magnetic tunnel junction (MTJ) structure, disposed on the selector; a spin orbit torque (SOT) layer, disposed between the selector and the MTJ structure, wherein the SOT layer has a sidewall aligned with a sidewall of the selector; a transistor, wherein the transistor has a drain electrically coupled to the MTJ structure; a word line, electrically coupled to a gate of the transistor; a bit line, electrically coupled to the SOT layer; a first source line, electrically coupled to a source of the transistor; and a second source line, electrically coupled to the selector, wherein the transistor is configured to control a write signal flowing between the bit line and the second source line, and control a read signal flowing between the bit line and the first source line.