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11.
公开(公告)号:US09997627B2
公开(公告)日:2018-06-12
申请号:US15709450
申请日:2017-09-19
Applicant: UNITED MICROELECTRONICS CORP.
IPC: H01L29/10 , H01L29/12 , H01L29/78 , H01L29/24 , H01L21/467 , H01L21/441 , H01L29/423 , H01L29/08 , H01L29/66
CPC classification number: H01L29/7827 , H01L21/441 , H01L21/467 , H01L29/0847 , H01L29/1037 , H01L29/24 , H01L29/42364 , H01L29/42392 , H01L29/66969 , H01L29/7869
Abstract: A semiconductor device includes: a channel layer surrounded by a source layer; a first dielectric layer around the source layer; a gate layer around the channel layer and on the source layer; a first oxide semiconductor layer between the gate layer and the channel layer; a second oxide semiconductor layer between the gate layer and the drain layer; a second gate dielectric layer between the second oxide semiconductor layer and the drain layer; a drain layer on the gate layer and around the channel layer; and a second dielectric layer around the drain layer.
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公开(公告)号:US09871049B1
公开(公告)日:2018-01-16
申请号:US15593345
申请日:2017-05-12
Applicant: UNITED MICROELECTRONICS CORP.
IPC: H01L29/06 , H01L47/00 , H01L27/11 , H01L23/48 , H01L45/00 , H01L27/24 , H01L23/525 , H01L23/532 , G11C14/00 , G11C11/419
CPC classification number: H01L27/1116 , G11C11/419 , G11C14/009 , H01L23/481 , H01L23/525 , H01L23/532 , H01L27/1104 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: A static random access memory device includes two body contacts and two resistive-switching devices. The body contacts are disposed in a wafer and are exposed from a back side of the wafer, wherein the body contacts electrically connect a static random access memory cell through a metal interconnect in the wafer. The resistive-switching devices connect the two body contacts respectively from the back side of the wafer. A method of forming a static random access memory device is also provided in the following. A wafer having two body contacts exposed from a back side of the wafer and a metal interconnect electrically connecting a static random access memory cell to the body contacts is provided. Two resistive-switching devices are formed to connect the two body contacts respectively from the back side of the wafer.
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公开(公告)号:US09793345B1
公开(公告)日:2017-10-17
申请号:US15390548
申请日:2016-12-26
Applicant: UNITED MICROELECTRONICS CORP.
IPC: H01L29/66 , H01L21/336 , H01L29/06 , H01L29/423 , H01L27/02
CPC classification number: H01L29/0619 , H01L27/0207 , H01L29/4238
Abstract: A semiconductor device is disclosed, including a plurality of gate rings formed on a substrate and concentrically surrounding a first doped region formed in the substrate. The gate rings are equipotentially interconnected by at least a connecting structure. A second doped region is formed in the substrate, exposed from the space between adjacent gate rings. A third doped region is formed in the substrate adjacent to the outer perimeter of the outermost gate ring. The first doped region, the third doped region and the gate rings are electrically biased and the second doped regions are electrically floating.
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公开(公告)号:US10347733B2
公开(公告)日:2019-07-09
申请号:US15802419
申请日:2017-11-02
Applicant: UNITED MICROELECTRONICS CORP.
Abstract: A radiofrequency switch device includes an insulation layer, a semiconductor layer, a gate structure, a first doped region, a second doped region, an epitaxial layer, a first silicide layer, and a second silicide layer. The semiconductor layer is disposed on the insulation layer. The gate structure is disposed on the semiconductor layer. The first doped region and the second doped region are disposed in the semiconductor layer at two opposite sides of the gate structure respectively. The epitaxial layer is disposed on the first doped region. The first silicide layer is disposed on the epitaxial layer. The second silicide layer is disposed in the second doped region.
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公开(公告)号:US09837497B1
公开(公告)日:2017-12-05
申请号:US15296045
申请日:2016-10-18
Applicant: UNITED MICROELECTRONICS CORP.
IPC: H01L29/66 , H01L29/165 , H01L21/306 , H01L29/786 , H01L29/76 , H01L29/423 , H01L29/34 , H01L29/06 , H01L29/20 , H01L29/24 , H01L21/308
CPC classification number: H01L29/34 , H01L21/30604 , H01L21/3085 , H01L29/0692 , H01L29/20 , H01L29/24 , H01L29/66969 , H01L29/785
Abstract: A channel structure includes a first patterned channel layer including a lower portion and an upper portion. The upper portion is disposed on the lower portion. A width of the upper portion is larger than a width of the lower portion. A material or a material composition ratio of the upper portion is different from a material or a material composition ratio of the lower portion. The height and the channel length of the channel structure are increased by disposing the first patterned channel layer, and the saturation current (Isat) of a transistor including the channel structure of the present invention may be enhanced accordingly.
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