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公开(公告)号：US07025662B2
公开(公告)日：2006-04-11
申请号：US11197755
申请日：2005-08-03
摘要： The invention relates to an arrangement of a chemical-mechanical polishing tool for chemical-mechanical polishing a surface on a wafer, comprising a polishing pad (4), a drive unit (9), pressing means (6), a wafer holder (5), first dispensing means (7) and second dispensing means (8); the wafer holder for holding a wafer (W) being arranged at a holder location (L0); the pressing means (6) being arranged to press the wafer holder (5) to the polishing pad (4); the first dispensing means (7) for dispensing a first fluid on the polishing pad (4) being arranged at a first dispensing means location (L1); the second dispensing means (8) for dispensing a second fluid on the polishing pad (4) being arranged at a second dispensing means location (L2); the polishing pad (4) comprising a polishing surface for polishing the wafer (W), and the polishing pad (4) further being connected to the drive unit (9) for moving the polishing surface in a first direction (ω1) relative to the holder location (L0);wherein the first dispensing means location (L1) of the first dispensing means (7) is arranged in a downstream direction with respect to the holder location (L0) at a first downstream distance (d1), with the downstream direction being taken in relation to the first direction (ω1); and the second dispensing means location (L2) of the second dispensing means (8) is arranged in an upstream direction with respect to the holder location (L0) at a first upstream distance (d3), with the upstream direction being taken in relation to the first direction (ω1).The invention further relates to a method of chemical-mechanical polishing using such an arrangement.
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12.发明授权Manufacturing method and integrated circuit having a light path to a pixilated element 有权具有到像素化元件的光路的制造方法和集成电路公开(公告)号：US08368105B2
公开(公告)日：2013-02-05
申请号：US12922072
申请日：2009-03-09
IPC分类号： H01L33/00
CPC分类号： H01L27/14625 , H01L27/14621 , H01L27/14636 , H01L27/14685
摘要： The present invention relates to a manufacturing method of an integrated circuit (IC) comprising a substrate (10) comprising a pixelated element (12) and a light path (38) to the pixelated element (12). The IC comprises a first dielectric layer (14) covering the substrate (10) but not the pixilated element (12), a first metal layer (16) covering a part of the first dielectric layer (14), a second dielectric layer (18) covering a further part of first dielectric layer (14), a second metal layer (20) covering a part of the second dielectric layer (18) and extending over the pixelated element (12) and a part of the first metal layer (16), the first metal layer (16) and the second metal layer (20) forming an air-filled light path (38) to the pixelated element (12). The air-filled light path (38) is formed by creation of holes in the first dielectric layer (14) and the second dielectric layer (18), filling the holes with sacrificial materials, and removal of the sacrificial materials after deposition and patterning of the second metal layer (20). This yields an IC having a low-loss light path to the pixelated element (12). The light path may act as a color filter, e.g. a Fabry-Perot color filter.
摘要翻译： 本发明涉及一种集成电路（IC）的制造方法，该集成电路（IC）包括基板（10），该基板（10）包括像素化元件（12）和到像素化元件（12）的光路（38）。 所述IC包括覆盖所述衬底（10）而不是所述像素化元件（12）的第一介电层（14），覆盖所述第一介电层（14）的一部分的第一金属层（16），第二介电层（18） ）覆盖第一介电层（14）的另一部分，覆盖第二介电层（18）的一部分并在像素化元件（12）上延伸的第二金属层（20）和第一金属层（16）的一部分 ），第一金属层（16）和第二金属层（20）形成到像素化元件（12）的充气光路（38）。 充气光路（38）通过在第一电介质层（14）和第二电介质层（18）中产生孔而形成，用牺牲材料填充孔，并且在沉积和图案化之后去除牺牲材料 第二金属层（20）。 这产生具有到像素化元件（12）的低损耗光路的IC。 光路可以用作滤色器，例如， 法布里 - 珀罗滤镜。
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公开(公告)号：US20110037135A1
公开(公告)日：2011-02-17
申请号：US12988110
申请日：2009-04-14
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L27/14685 , H01L21/31053 , H01L21/31111 , H01L27/14621 , H01L27/14629
摘要： A method of providing a dielectric material (18) having regions (18′, 18″) with a varying thickness in an IC manufacturing process is disclosed. The method comprises forming a plurality of patterns in respective regions (20′, 20″) of the dielectric material (18), each pattern increasing the susceptibility of the dielectric material (18) to a dielectric material removal step by a predefined amount and exposing the dielectric material (18) to the dielectric material removal step. In an embodiment, the IC comprises a plurality of pixilated elements (12) and a plurality of light interference elements (24), each comprising a first mirror element (16) and a second mirror element (22), a region of the dielectric material (18) separating the first mirror element (16) and the second element (22), and each being arranged over one of said pixilated elements (12), the method further comprising forming the respective first mirror elements (16) in a dielectric layer (14) over a substrate (10) comprising the plurality of pixilated elements; depositing the dielectric material over the dielectric layer; and forming the respective second mirror elements such that each second mirror element is separated from a respective first mirror element by a region of the exposed dielectric material. Hence, an IC having a layer of a dielectric material (18) comprising regions of different thicknesses can be obtained requiring only a few process steps.
摘要翻译： 公开了一种在IC制造过程中提供具有变化厚度的区域（18'，18“）的介电材料（18）的方法。 该方法包括在介电材料（18）的相应区域（20'，20“）中形成多个图案，每个图案将电介质材料（18）的敏感性增加到电介质材料去除步骤预定量并暴露 电介质材料（18）到介电材料去除步骤。 在一个实施例中，IC包括多个像素化元件（12）和多个光干涉元件（24），每个元件包括第一镜元件（16）和第二镜元件（22），介电材料的区域 （18）分离第一镜元件（16）和第二元件（22），并且每个被布置在一个所述像素化元件（12）上，所述方法还包括在电介质层中形成相应的第一镜元件（16） （14）包括多个像素化元件的衬底（10）上; 在电介质层上沉积电介质材料; 以及形成各个第二反射镜元件，使得每个第二反射镜元件通过暴露的电介质材料的区域与相应的第一反射镜元件分离。 因此，可以获得具有包括不同厚度的区域的电介质材料层（18）的IC，只需要几个工艺步骤。
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14.发明申请SYSTEM AND METHOD FOR ESTIMATING THE JUNCTION TEMPERATURE OF A LIGHT EMITTING DIODE 有权用于估计发光二极管的连接温度的系统和方法公开(公告)号：US20110031903A1
公开(公告)日：2011-02-10
申请号：US12863744
申请日：2009-01-27
CPC分类号： H05B33/0818 , G01K7/01 , H05B33/0866 , H05B33/089
摘要： A method of estimating the junction temperature of a light emitting diode comprises driving a forward bias current through the diode, the current comprising a square wave which toggles between high and low current values (Ihigh, llow), the high current value (lhigh) comprising an LED operation current, and the low current value (IIOW) comprising a non-zero measurement current. The forward bias voltage drop (Vf) is sampled and the forward bias voltage drop (Vflow) is determined at the measurement current (IIOW)—The temperature is derived from the determined forward bias voltage drop.
摘要翻译： 估计发光二极管的结温的方法包括驱动通过二极管的正向偏置电流，该电流包括在高电流值和低电流值（Ihigh，llow）之间切换的方波，高电流值（lhigh）包括 LED操作电流和包括非零测量电流的低电流值（IIOW）。 正向偏置电压降（Vf）被采样，并且在测量电流（IIOW）下确定正向偏置电压降（Vflow） - 温度来自所确定的正向偏压电压降。
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公开(公告)号：US20100090302A1
公开(公告)日：2010-04-15
申请号：US12444684
申请日：2007-10-05
IPC分类号： H01L23/28 , H01L21/336 , H01L21/31
CPC分类号： H03H9/2405 , H03H3/0072 , H03H2009/02496
摘要： A method of making a resonator, preferably a nano-resonator, includes starting with a FINFET structure with a central bar, first and second electrodes connected to the central bar, and third and fourth electrodes on either side of the central bar and separated from the central bar by gate dielectric. The structure is formed on a buried oxide layer. The gate dielectric and buried oxide layer are then selectively etched away to provide a nano-resonator structure with a resonator element 30, a pair of resonator electrodes (32,34), a control electrode (36) and a sensing electrode (38).
摘要翻译： 一种制造谐振器，优选纳米谐振器的方法包括以中心棒，连接到中心棒的第一和第二电极以及中心棒的任一侧上的第三和第四电极的FINFET结构开始并与 中央棒由栅极电介质。 该结构形成在掩埋氧化物层上。 然后选择性地蚀刻栅极电介质和掩埋氧化物层以提供具有谐振元件30，一对谐振器电极（32,34），控制电极（36）和感测电极（38）的纳米谐振器结构。
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16.发明申请公开(公告)号：US20060128089A1
公开(公告)日：2006-06-15
申请号：US10539280
申请日：2003-12-15
IPC分类号： H01L21/8238
CPC分类号： H01L21/76828 , H01L21/76807 , H01L2221/1026
摘要： The invention relates to the manufacture of a semiconductor device (10) with a semiconductor body (1) and a substrate (2) and comprising at least one semiconductor element (3), which semiconductor device is equipped with at least one connection region (4) and a superjacent strip-shaped connection conductor (5) which is connected to the connection region, which connection region and connection conductor are both recessed in a dielectric, and a dielectric region (6) of a first material is provided on the semiconductor body (1) at the location of the connection region (4) to be formed, after which the dielectric region (6) is coated with a dielectric layer (7) of a second material that differs from the first material, which dielectric layer is provided, at the location of the strip-shaped connection conductor (5) to be formed, with a strip-shaped recess (7A) which overlaps the dielectric region (6) and extends up to said dielectric region, and after the formation of the recess (7A) and the removal of the dielectric region (6), the connection region (4) is formed by depositing an electroconductive material in the space (6A) created by the removal of the dielectric region (6), and the connection conductor (5) is formed by depositing an electroconductive material in the recess (7A). According to the invention, for the first material use is made of an organic material, and for the second material use is made of a material having a higher decomposition temperature than the organic material, and the dielectric region (6) is removed by heating it at a temperature above the decomposition temperature of the organic material yet below the decomposition temperature of the second material. A method according to the invention is very simple and, due to an optimal choice for the second material, may result in a high planarity of the device (10) obtained. For the dielectric region (4), use is preferably made of a photoresist, and for the dielectric layer (7), use is preferably made of a liquid material such as a SILK or SOG material which is converted to the solid state by heating.
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公开(公告)号：US20060014479A1
公开(公告)日：2006-01-19
申请号：US11197755
申请日：2005-08-03
摘要： The invention relates to an arrangement of a chemical-mechanical polishing tool for chemical-mechanical polishing a surface on a wafer, comprising a polishing pad (4), a drive unit (9), pressing means (6), a wafer holder (5), first dispensing means (7) and second dispensing means (8); the wafer holder for holding a wafer (W) being arranged at a holder location (L0); the pressing means (6) being arranged to press the wafer holder (5) to the polishing pad (4); the first dispensing means (7) for dispensing a first fluid on the polishing pad (4) being arranged at a first dispensing means location (L1); the second dispensing means (8) for dispensing a second fluid on the polishing pad (4) being arranged at a second dispensing means location (L2); the polishing pad (4) comprising a polishing surface for polishing the wafer (W), and the polishing pad (4) further being connected to the drive unit (9) for moving the polishing surface in a first direction (ω1) relative to the holder location (L0); wherein the first dispensing means location (L1) of the first dispensing means (7) is arranged in a downstream direction with respect to the holder location (L0) at a first downstream distance (d1), with the downstream direction being taken in relation to the first direction (ω1); and the second dispensing means location (L2) of the second dispensing means (8) is arranged in an upstream direction with respect to the holder location (L0) at a first upstream distance (d3), with the upstream direction being taken in relation to the first direction (ω1). The invention further relates to a method of chemical-mechanical polishing using such an arrangement.
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公开(公告)号：US09386655B2
公开(公告)日：2016-07-05
申请号：US12994650
申请日：2009-05-21
CPC分类号： H05B33/0869 , G01J1/02 , G01J1/0209 , G01J1/04 , G01J1/0407 , G01J1/0425 , G01J1/32 , G01J2001/4247 , H05B33/0821
摘要： A light sensor device comprises a substrate (10) having a well (12) defined in one surface. At least one light sensor (14) is formed at the base of the well (12), and an optical light guide (18) in the form of a transparent tunnel (18) within an opaque body (20) extends from a top surface of the device down a sloped side wall of the well (12) to the location of the light sensor (14).
摘要翻译： 光传感器装置包括具有在一个表面中限定的阱（12）的衬底（10）。 至少一个光传感器（14）形成在井（12）的基部处，并且在不透明体（20）内的透明隧道（18）形式的光导（18）从顶表面 （12）的倾斜的侧壁上的装置到光传感器（14）的位置。
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19.发明授权Lighting unit with compensation for output frequency, and method for determining output frequency 有权输出频率补偿的照明单元，输出频率的确定方法公开(公告)号：US08896317B2
公开(公告)日：2014-11-25
申请号：US12867218
申请日：2009-02-09
CPC分类号： H05B33/0866
摘要： A method of determining the dominant output wavelength of an LED, includes determining an electrical characteristic of the LED which is dependent on the voltage-capacitance characteristics, and analyzing the characteristic to determine the dominant output wavelength.
摘要翻译： 确定LED的主要输出波长的方法包括确定取决于电压 - 电容特性的LED的电特性，以及分析该特性以确定主要输出波长。
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公开(公告)号：US08376801B2
公开(公告)日：2013-02-19
申请号：US12922127
申请日：2009-03-09
IPC分类号： H01J9/24
CPC分类号： H05B33/10 , Y10T428/24298 , Y10T428/24331
摘要： The present invention relates to a luminescent component (30) and a manufacturing method thereof. The luminescent component (30) comprises a first transparent carrier (18), a second transparent carrier (24), a substrate (10) sandwiched between said transparent carriers (18; 24), the substrate (10) comprising a conduit from the first transparent layer (18) to the second transparent carrier (24), the conduit being filled with a luminescent solution (20). This facilitates the use of colloidal solutions of quantum dots in such a luminescent component (30). Preferably, the substrate (10) is direct bonded to the transparent carriers (18, 24) using direct wafer bonding techniques.
摘要翻译： 本发明涉及发光成分（30）及其制造方法。 发光组件（30）包括第一透明载体（18），第二透明载体（24），夹在所述透明载体（18; 24）之间的基底（10），所述基底（10） 透明层（18）连接到第二透明载体（24），导管填充有发光溶液（20）。 这有助于在这种发光组分（30）中使用量子点的胶体溶液。 优选地，使用直接晶片接合技术将衬底（10）直接接合到透明载体（18,24）。
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