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    INTERFACE LAYER IMPROVEMENTS FOR NONVOLATILE MEMORY APPLICATIONS
    15.
    发明申请
    INTERFACE LAYER IMPROVEMENTS FOR NONVOLATILE MEMORY APPLICATIONS 审中-公开
    界面层对非易失性存储器应用的改进

    公开(公告)号：US20130065377A1

    公开(公告)日：2013-03-14

    申请号：US13228744

    申请日：2011-09-09

    申请人： Vidyut Gopal ,  Yun Wang ,  Imran Hashim

    发明人： Vidyut Gopal ,  Yun Wang ,  Imran Hashim

    IPC分类号： H01L47/00

    CPC分类号： H01L27/2463 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1641

    摘要： A resistive switching nonvolatile memory device having an interface layer disposed between a doped silicon electrode and a variable resistance layer fabricated in the nonvolatile memory device and methods of fabricating the same. In one embodiment, the interface layer is a high-k layer having a lower electrical EOT than native silicon oxide to act as a diffusion barrier between the variable resistance layer and the silicon electrode. Alternatively, the high-k interface layer may be formed by performing a nitrogen treatment on a fabricated silicon oxide layer. In another embodiment, the interface layer may be fabricated by performing a nitrogen or ozone treatment on the native oxide layer. In another embodiment, the interface layer is a fabricated silicon oxide layer resulting in an improved diffusion barrier between the variable resistance layer and the silicon electrode. In all embodiments, the interface layer also passivates the surface of the silicon electrode.

    摘要翻译： 一种电阻式开关非易失性存储器件，其具有设置在非易失性存储器件中制造的掺杂硅电极和可变电阻层之间的界面层及其制造方法。 在一个实施例中，界面层是具有比天然氧化硅更低的电EOT的高k层，以在可变电阻层和硅电极之间充当扩散势垒。 或者，可以通过对制造的氧化硅层进行氮处理来形成高k界面层。 在另一个实施方案中，界面层可以通过在自然氧化物层上进行氮气或臭氧处理来制造。 在另一个实施例中，界面层是制造的氧化硅层，从而在可变电阻层和硅电极之间形成改善的扩散势垒。 在所有实施例中，界面层还钝化硅电极的表面。

    Atomic layer deposition of metal oxide materials for memory applications
    16.
    发明授权
    Atomic layer deposition of metal oxide materials for memory applications 有权
    用于记忆应用的金属氧化物材料的原子层沉积

    公开(公告)号：US08288297B1

    公开(公告)日：2012-10-16

    申请号：US13224021

    申请日：2011-09-01

    申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

    发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

    摘要翻译： 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

    NONVOLATILE MEMORY DEVICE HAVING AN ELECTRODE INTERFACE COUPLING REGION
    17.
    发明申请
    NONVOLATILE MEMORY DEVICE HAVING AN ELECTRODE INTERFACE COUPLING REGION 有权
    具有电极接口连接区域的非易失性存储器件

    公开(公告)号：US20120313063A1

    公开(公告)日：2012-12-13

    申请号：US13156722

    申请日：2011-06-09

    申请人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    发明人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1608 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625

    摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

    摘要翻译： 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成 器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A NOVEL SWITCHING LAYER
    18.
    发明申请
    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A NOVEL SWITCHING LAYER 审中-公开
    具有新开关层的非易失性电阻记忆元件

    公开(公告)号：US20130134373A1

    公开(公告)日：2013-05-30

    申请号：US13305568

    申请日：2011-11-28

    申请人： Yun Wang ,  Imran Hashim ,  Tony Chiang

    发明人： Yun Wang ,  Imran Hashim ,  Tony Chiang

    IPC分类号： H01L45/00

    CPC分类号： G11C13/0007 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

    摘要： A nonvolatile resistive memory element has a novel variable resistance layer comprising one or more rare-earth oxides. The rare-earth oxide has a high k value, a high bandgap energy, and the ability to maintain an amorphous structure after thermal anneal processes. Thus, the novel variable resistance layer facilitates improved switching performance and reliability of the resistive memory element.

    摘要翻译： 非易失性电阻存储元件具有包含一种或多种稀土氧化物的新颖的可变电阻层。 稀土氧化物具有高k值，高带隙能，以及热退火工艺后保持非晶结构的能力。 因此，新颖的可变电阻层有助于提高电阻式存储元件的开关性能和可靠性。

    Defect gradient to boost nonvolatile memory performance
    19.
    发明授权
    Defect gradient to boost nonvolatile memory performance 有权
    缺陷梯度以提升非易失性存储器性能

    公开(公告)号：US08659001B2

    公开(公告)日：2014-02-25

    申请号：US13223950

    申请日：2011-09-01

    申请人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    发明人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    IPC分类号： H01L47/00

    CPC分类号： H01L45/122 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1608

    摘要： Embodiments of the present invention generally relate to a resistive switching nonvolatile memory element that is formed in a resistive switching memory device that may be used in a memory array to store digital data. The memory element is generally constructed as a metal-insulator-metal stack. The resistive switching portion of the memory element includes a getter portion and/or a defect portion. In general, the getter portion is an area of the memory element that is used to help form, during the resistive switching memory device's fabrication process, a region of the resistive switching layer that has a greater number of vacancies or defects as compared to the remainder of resistive switching layer. The defect portion is an area of the memory element that has a greater number of vacancies or defects as compared to the remainder of the resistive switching layer, and is formed during the resistive switching memory device's fabrication process. The addition of the getter or defect portions in a formed memory device generally improves the reliability of the resistive switching memory device, improves the switching characteristics of the formed memory device and can eliminate or reduce the need for the time consuming additional post fabrication “burn-in” or pre-programming steps.

    摘要翻译： 本发明的实施例一般涉及一种电阻式开关非易失性存储元件，其形成在电阻式开关存储器件中，其可用于存储阵列中以存储数字数据。 存储元件通常构造为金属 - 绝缘体 - 金属叠层。 存储元件的电阻开关部分包括吸气部分和/或缺陷部分。 通常，吸气剂部分是存储元件的区域，其用于帮助在电阻式开关存储器件的制造过程期间形成与其余部分相比具有更多数量的空位或缺陷的电阻式开关层的区域 的电阻式开关层。 缺陷部分是与电阻开关层的其余部分相比具有更多数量的空位或缺陷的存储元件的区域，并且在电阻式开关存储器件的制造过程期间形成。 吸收剂或缺陷部分在形成的存储器件中的添加通常提高了电阻式开关存储器件的可靠性，改进了所形成的存储器件的开关特性，并且可以消除或减少耗费时间的附加后制造“ 在“或预编程步骤。

    Work function tailoring for nonvolatile memory applications
    20.
    发明授权
    Work function tailoring for nonvolatile memory applications 有权

    公开(公告)号：US08618525B2

    公开(公告)日：2013-12-31

    申请号：US13156624

    申请日：2011-06-09

    申请人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    发明人： Yun Wang ,  Tony Chiang ,  Imran Hashim

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1608 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/065 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1633 ,  H01L45/1641

    摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.