公开(公告)号：US20170059656A1

公开(公告)日：2017-03-02

申请号：US15350902

申请日：2016-11-14

申请人： Dell Products L.P.

发明人： Umesh Chandra ,  Timothy Thinh Mai

IPC分类号： G01R31/317 ,  G01R31/3177

CPC分类号： G01R31/31703 ,  G01R31/31708 ,  G01R31/31712 ,  G01R31/31716 ,  G01R31/3177 ,  G01R31/31813 ,  G01R31/31907 ,  G06F11/2221

摘要： A backplane testing system includes a test backplane coupled to a test device chassis and including a first connector system, a second connector system, and channels that connect the first connector system and the second connector system. A first test device in a first test device slot on the test device chassis engages the first connector system and provides a loop back circuit for the first connector system. A second test device in a second test device slot on the test device chassis engages the second connector system. The second test device sends a test signal through a channel on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the channel. The second test device analyzes the test signal that is received to determine a testing compliance of the channel on the test backplane.

摘要翻译： 背板测试系统包括耦合到测试设备机箱并包括第一连接器系统，第二连接器系统和连接第一连接器系统和第二连接器系统的通道的测试背板。 测试设备底盘上的第一测试设备插槽中的第一测试设备接合第一连接器系统，并为第一连接器系统提供环回电路。 第二测试设备在测试设备底盘上的第二测试设备插槽中接合第二连接器系统。 第二测试设备通过测试背板上的通道发送测试信号，使得测试信号被提供给第一测试设备上的环回电路并通过通道接收回来。 第二个测试设备分析接收到的测试信号，以确定测试背板上的通道的测试符合性。

公开(公告)号：US09484116B1

公开(公告)日：2016-11-01

申请号：US14827743

申请日：2015-08-17

申请人： ADVANTEST CORPORATION

发明人： Masaaki Kosugi ,  Takashi Ohguro ,  Michisuke Sakamoto ,  Toshiro Fujii ,  Takahiro Honma ,  Hideto Omori

IPC分类号： G01R31/28 ,  G06F11/00 ,  G11C29/38 ,  G11C29/36 ,  G01R31/319

CPC分类号： G11C29/38 ,  G01R31/28 ,  G01R31/31903 ,  G01R31/31907 ,  G01R31/31935 ,  G11C29/56 ,  G11C29/56008 ,  G11C29/70

摘要： At least one general-purpose server is connected to a PE module via Ethernet (trademark). A control unit of the PE module controls a PE circuit and multiple fail memory in a real-time manner, temporarily stores fail information stored in the multiple fail memory, performs data processing on the fail information, and transfers the fail information thus processed to the general-purpose server. Each general-purpose server is controlled according to a computer program so as to perform redundancy analysis for a DUT based on the data received from the PE module.

摘要翻译： 至少一个通用服务器通过以太网（商标）连接到PE模块。 PE模块的控制单元实时控制PE电路和多个故障存储器，临时存储存储在多个故障存储器中的故障信息，对故障信息执行数据处理，并将所处理的故障信息传送到 通用服务器。 根据计算机程序控制每个通用服务器，以便根据从PE模块接收到的数据对DUT进行冗余分析。

公开(公告)号：US20160313370A1

公开(公告)日：2016-10-27

申请号：US14655684

申请日：2014-07-28

申请人： INTEL CORPORATION

发明人： James Neeb ,  Vineet Pancholi ,  Gerard McSweeney ,  Shelby Rollins ,  Chris Johnson ,  Nathan Blackwell ,  Bradly L. Inman ,  Steven Lill ,  Rodney J. Christner ,  Phillip Barnes

IPC分类号： G01R1/02 ,  G01R31/28 ,  G01R29/26

CPC分类号： G01R1/025 ,  G01R29/26 ,  G01R31/2896 ,  G01R31/31907

摘要： A method is described that includes configuring multiple test units of a semiconductor device tester with respective information indicating respective storage space within either or both of an off load processing unit and central control unit of the tester. The method further includes streaming DUT data from the test units to their respective storage space within at least one of the off load processing unit and the central control unit such that the test units continually initiate the sending of their respective DUT data to their respective storage space.

摘要翻译： 描述了一种方法，其包括配置半导体器件测试器的多个测试单元，其各自的信息指示测试仪的卸载处理单元和中央控制单元中的任一个或两者中的相应存储空间。 该方法还包括将DUT数据从测试单元传送到其关闭负载处理单元和中央控制单元中的至少一个中的相应存储空间，使得测试单元连续地开始将它们各自的DUT数据发送到它们各自的存储空间 。

公开(公告)号：US09446519B2

公开(公告)日：2016-09-20

申请号：US13874425

申请日：2013-04-30

申请人： VMware, Inc.

发明人： Gavin Gray ,  Ben Duong

IPC分类号： B25J9/16 ,  G06F11/26 ,  G01R31/28 ,  G06F11/22 ,  G06F3/0488 ,  H04M1/24 ,  G06F3/044 ,  B25J13/08 ,  G06F3/041 ,  G01R31/319

CPC分类号： B25J9/1679 ,  B25J9/161 ,  B25J9/1697 ,  B25J13/081 ,  G01R31/2889 ,  G01R31/31907 ,  G05B2219/40041 ,  G05B2219/40174 ,  G05B2219/45089 ,  G06F3/0416 ,  G06F3/044 ,  G06F3/0488 ,  G06F11/2221 ,  G06F11/26 ,  H04M1/24

摘要： In one example, a method is provided for a computing device to facilitate testing of an electronic apparatus. The method includes receiving a request from an apparatus coupled to a network to which the computing device is also coupled. The method further includes retrieving a command for a robot controlled by the computing device from the request, and configuring the robot to physically interface with the electronic apparatus to perform one or more tests according to the command.

摘要翻译： 在一个示例中，提供了一种用于计算设备以便于测试电子设备的方法。 该方法包括从耦合到计算设备还耦合到的网络的设备接收请求。 该方法还包括从请求中检索由计算设备控制的机器人的命令，以及将机器人配置为与电子设备物理接口以根据该命令执行一个或多个测试。

公开(公告)号：US20160238657A1

公开(公告)日：2016-08-18

申请号：US15008594

申请日：2016-01-28

申请人： Allen Czamara ,  Ed Paulsen ,  Lev Alperovich

发明人： Allen Czamara ,  Ed Paulsen ,  Lev Alperovich

IPC分类号： G01R31/317 ,  G01R31/3177 ,  G01R31/28

CPC分类号： G01R31/2834 ,  G01R31/31704 ,  G01R31/31705 ,  G01R31/31907 ,  G01R31/31908

摘要： A test system based on multiple instances of reconfigurable instrument IP specifically matched to the device under test may be used in integrating automated testing of semiconductor devices between pre-silicon simulation, post-silicon validation, and production test phases, in one embodiment of software and hardware across all three phases, for different devices. The reconfigurable test system comprises: a tester instrument, instances of instrument IP instantiated in the tester instruments, a computer system, and a test program. The tester instrument connects to a device under test (DUT), and includes FPGAs reconfigurable for the three testing phases. The computer system has a user interface, and a controller connected to the reconfigurable tester instrument via a data bus. The test program stored on the controller, and the controller, instantiates interfaces and protocols, and certain process transactions to support the protocols, into FPGAs, to match device interfaces for each DUT, to execute test sequences.

公开(公告)号：US09217772B2

公开(公告)日：2015-12-22

申请号：US13562485

申请日：2012-07-31

申请人： Kar Meng Thong ,  Alvin L. Calma

发明人： Kar Meng Thong ,  Alvin L. Calma

IPC分类号： G06F17/50 ,  G11C29/00 ,  G01R31/28 ,  G01R31/30 ,  G01R31/3183 ,  G06F11/263 ,  G06F11/36 ,  G06F11/26 ,  G01R31/319

CPC分类号： G01R31/30 ,  G01R31/318314 ,  G01R31/31907 ,  G06F11/261 ,  G06F11/263 ,  G06F11/362 ,  Y02T10/82

摘要： A device characterization system includes a characterization tool and a test flow development generator. The characterization tool is configured to perform testing on a product device according to a test flow and generate test data. The characterization tool includes a list of available test instances that can be performed. The test flow development generator is configured to automatically generate the test flow according to device specifications for the product device and selected test instances of the list of available test instances.

摘要翻译： 器件表征系统包括表征工具和测试流程开发生成器。 表征工具被配置为根据测试流程在产品设备上执行测试并生成测试数据。 表征工具包括可执行的可用测试实例的列表。 测试流程开发生成器被配置为根据产品设备的设备规范和可用测试实例列表的所选测试实例自动生成测试流程。

公开(公告)号：US20140330533A1

公开(公告)日：2014-11-06

申请号：US13908470

申请日：2013-06-03

申请人： Matthew Gadlage ,  Adam Duncan

发明人： Matthew Gadlage ,  Adam Duncan

IPC分类号： G01R31/317

CPC分类号： G01R31/303 ,  G01R31/302 ,  G01R31/31725 ,  G01R31/31907 ,  G06F13/36 ,  G06F13/4068 ,  G06F13/4282 ,  G11C11/4125 ,  G11C29/56 ,  G11C2029/5002

摘要： A highly flexible, compact, lightweight, and portable testing system for use with radiation testing activities. The testing system is coupled to a device under test (DUT), which can be positioned in such a way that the top of the die package is exposed to the direct ion beam during radiation testing. A variety of sensors, onboard memory systems, programmable interfaces, onboard control systems, data output devices, and different types of interfaces are also provided which provide an ability to perform testing procedures while having a maximum ability to orient the DUT and perform a wide variety of testing currently unavailable.

摘要翻译： 高度灵活，紧凑，重量轻且便于携带的测试系统，用于辐射测试活动。 测试系统耦合到被测设备（DUT），其可以以这样的方式定位，使得在辐射测试期间，芯片封装的顶部暴露于直接离子束。 还提供了各种传感器，板载存储器系统，可编程接口，车载控制系统，数据输出设备和不同类型的接口，其提供执行测试程序的能力，同时具有定向DUT并且执行多种多样的最大能力 的测试目前无法使用。

公开(公告)号：US08788898B2

公开(公告)日：2014-07-22

申请号：US13153128

申请日：2011-06-03

申请人： Edward Kent

发明人： Edward Kent

IPC分类号： G01R31/28 ,  G06F11/00 ,  G11C29/00 ,  H04B1/04 ,  H04B1/16 ,  H04B1/38 ,  G01R31/40 ,  G01R31/317 ,  G11C5/14 ,  G11C11/22 ,  G11C13/00 ,  G01R31/3185 ,  G06F21/81 ,  H04W52/00 ,  H04W52/02 ,  H04W52/30 ,  H04W52/38

CPC分类号： G01R31/31721 ,  G01R31/281 ,  G01R31/31713 ,  G01R31/318533 ,  G01R31/318572 ,  G01R31/31907 ,  G06F21/81 ,  G11C5/14 ,  G11C11/2297 ,  G11C13/0038 ,  H04W52/00 ,  H04W52/02 ,  H04W52/30 ,  H04W52/383

摘要： An apparatus is provided that comprises a test circuit; a first receiver unit arranged to receive test commands and to provide the test commands to the test circuit; a power supply unit arranged to supply power to the test circuit and to the first receiver unit; a second receiver unit arranged to receive power commands. The second receiver is arranged to control the operation of the power supply unit in response to the power commands received by the second receiver unit.

摘要翻译： 提供了一种包括测试电路的装置; 第一接收器单元，布置成接收测试命令并向测试电路提供测试命令; 电源单元，其布置成向所述测试电路和所述第一接收器单元供电; 布置成接收功率命令的第二接收器单元。 第二接收器被布置成响应于由第二接收器单元接收的功率命令来控制电源单元的操作。

公开(公告)号：US08745200B2

公开(公告)日：2014-06-03

申请号：US12115571

申请日：2008-05-06

申请人： Vinayak Mohan Mali

发明人： Vinayak Mohan Mali

IPC分类号： G06F15/173 ,  G06F9/44 ,  G06F11/00

CPC分类号： G01R31/31907 ,  G06F11/273

摘要： Testing operation of processors setup to operate in different modes. In an embodiment, each tester system includes a processor setup to operate in a corresponding mode. A user sends a test request to a scheduler system indicating the mode of the processor sought to be tested, and the scheduler system forwards the test request to one of the tester systems with a processor setup to test the requested configuration. The scheduler system may maintain configuration information indicating which processors are setup to test which modes of interest, and also status information indicating which tester systems are presently available for testing. The configuration information and status information is used in determining a specific suitable tester system to which a test request is to be forwarded.

摘要翻译： 处理器的测试操作设置为以不同的模式运行。 在一个实施例中，每个测试器系统包括以对应模式操作的处理器设置。 用户向调度器系统发送指示被测试的处理器的模式的测试请求，并且调度器系统使用处理器设置将测试请求转发到测试器系统之一以测试所请求的配置。 调度器系统可以维护指示哪些处理器被设置以测试哪些感兴趣的模式的配置信息，以及指示哪些测试器系统当前可用于测试的状态信息。 配置信息和状态信息用于确定要转发测试请求的特定合适的测试器系统。

公开(公告)号：US08547125B2

公开(公告)日：2013-10-01

申请号：US12694149

申请日：2010-01-26

申请人： Tadashi Morita ,  Tetsuya Koishi ,  Takeshi Yaguchi

发明人： Tadashi Morita ,  Tetsuya Koishi ,  Takeshi Yaguchi

IPC分类号： G01R31/3187

CPC分类号： G01R31/31907

摘要： Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.

摘要翻译： 提供了一种用于测试至少一个被测设备的测试装置，包括：包括多个测试部分的测试模块，所述多个测试部分通过与被测设备交换信号来测试被测设备; 以及多个测试控制部分，其控制所述多个测试部分，其中所述测试模块包括所述多个测试部分; 设置存储部，其存储关于所述多个测试控制部中的哪个应当与所述多个测试部中的每一个相关联的设置; 以及连接到所述多个测试部分的接口部分，提供从所述多个测试控制部分中的一个发出并且被引导到所述测试模块的访问请求到与所述测试控制部分相关联的测试部分，并且能够 对于多个测试部分中的每个测试部分独立设置，多个测试控制部分中的哪一个应该控制测试部分。