公开(公告)号：US07116721B1

公开(公告)日：2006-10-03

申请号：US10151322

申请日：2002-05-20

Applicant: John Laurence Melanson ,  Heling Yi

Inventor： John Laurence Melanson ,  Heling Yi

IPC: H04B14/06 ,  H03M3/02

CPC classification number: H03M7/304 ,  H03M7/3026 ,  H03M7/3028

Abstract: A feedback noise-shaper of an order of at least three implements a first pole set defining a signal transfer function of a selected corner frequency and a second pole set having at least one pole at a frequency at least twice the selected corner frequency defining a noise transfer function.

Abstract translation: 至少三个级别的反馈噪声整形器实现了定义所选转角频率的信号传递函数的第一极点集合和具有至少一个极点的第二极点，频率至少为所选转角频率的两倍，所述转角频率限定噪声 传递函数。

公开(公告)号：US07068280B1

公开(公告)日：2006-06-27

申请号：US10316727

申请日：2002-12-11

Applicant: Joel C. McKee Cooper ,  Raghunath Rao ,  Miroslav Dokic

Inventor： Joel C. McKee Cooper ,  Raghunath Rao ,  Miroslav Dokic

IPC: G06T1/60 ,  G09G1/399 ,  G01C7/10 ,  G01C8/00

CPC classification number: G06F5/10 ,  G06F3/16 ,  G10L19/16 ,  H04N21/4392

Abstract: Overlay buffering scheme for multi-channel data in which one memory buffer content is overlayed over another as memory locations of an input buffer are freed when data is output from the input buffer. By overlaying the buffer content, only one input buffer is used, reducing the needed memory by half.

Abstract translation: 当从输入缓冲器输出数据时，多通道数据的叠加缓冲方案被释放，其中一个存储器缓冲器内容覆盖另一个存储器缓冲器内容作为输入缓冲器的存储器位置。 通过覆盖缓冲区内容，仅使用一个输入缓冲区，将所需内存减少一半。

公开(公告)号：US07062340B2

公开(公告)日：2006-06-13

申请号：US10397767

申请日：2003-03-26

Applicant: John Laurence Melanson

Inventor： John Laurence Melanson

IPC: G06F17/00

CPC classification number: G10L19/038 ,  G10L19/008

Abstract: A method of processing digital audio data includes receiving an input stream of audio data having a first quantization and a high oversampling rate. The input stream is requantized in a first processing block at the high oversampling rate to a second quantization. The requantized stream of audio data is processed in a second processing block at the high oversampling rate and the second quantization.

Abstract translation: 一种处理数字音频数据的方法包括接收具有第一量化和高过采样速率的音频数据的输入流。 将输入流以高过采样速率在第一处理块中重新量化为第二量化。 音频数据的再量化流以高过采样速率和第二量化在第二处理块中进行处理。

公开(公告)号：US07032083B1

公开(公告)日：2006-04-18

申请号：US10217364

申请日：2002-08-13

Applicant: Robert Arthur Jensen ,  Mail Khoi ,  Vikram Shenoy ,  Dimitris Pantelakis

Inventor： Robert Arthur Jensen ,  Mail Khoi ,  Vikram Shenoy ,  Dimitris Pantelakis

IPC: G06F12/00

CPC classification number: G11C8/10

Abstract: Memory address decoder circuitry including a decoder for activating a corresponding memory access control conductor in response to registered address bits. An address register stores received address bits for presentation to the inputs of the decoder and includes reset circuitry for resetting the outputs of the address register to an inactive state during an inactive time period to reduce transition glitches in the decoder during latching in a subsequent active period.

Abstract translation: 存储器地址解码器电路，包括用于响应于所注册的地址位来激活对应的存储器访问控制导体的解码器。 地址寄存器存储用于呈现给解码器的输入端的接收地址位，并且包括复位电路，用于在非活动时间周期期间将地址寄存器的输出复位为非活动状态，以减少在随后的有效期间内锁存期间解码器中的转换毛刺 。

公开(公告)号：US07019677B1

公开(公告)日：2006-03-28

申请号：US10936997

申请日：2004-09-08

Applicant: Manoj Shridhar Soman ,  Krishnan Subramoniam ,  Rajendra Datar

Inventor： Manoj Shridhar Soman ,  Krishnan Subramoniam ,  Rajendra Datar

IPC: H03M1/66

CPC classification number: H03M1/1047 ,  H03M1/1061 ,  H03M1/682 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747

Abstract: A current steering digital to analog converter includes a current source for selectively providing a selected amount of current to an output in response to input data. The current source includes a selected number of sub-current sources for selectively providing fractions of the selected amount of current to the output. Compensation current sources each provide a selected amount of compensation current to the output. Compensation control circuitry, in response to the input data, selectively activates and de-activates selected ones of the sub-current sources and the compensation current sources to provide current compensation at the output.

Abstract translation: 电流转向数模转换器包括电流源，用于响应于输入数据选择性地向输出提供选定量的电流。 电流源包括选定数量的子电流源，用于选择性地将所选择的电流量的分数提供给输出。 补偿电流源各自为输出提供选定量的补偿电流。 补偿控制电路响应于输入数据，选择性地激活和去激活子电流源中的所选择的电流源和补偿电流源，以在输出端提供电流补偿。

公开(公告)号：US07015853B1

公开(公告)日：2006-03-21

申请号：US11076790

申请日：2005-03-09

Applicant: Clinton R. Wolff ,  John Melanson

Inventor： Clinton R. Wolff ,  John Melanson

IPC: H03M1/38

CPC classification number: H03M1/0641 ,  H03M1/468

Abstract: Methods and apparatus are provided for reducing nonlinearities in an analog-to-digital signal converter. An analog pseudo-random noise sample is added to an analog input sample and the combined sample is converted into a digital representation. A pseudo-random digital sample corresponding to the analog noise sample is subtracted from the converted digital representation. Preferably, multiple analog noise samples are added to the analog input sample, converted and corresponding digital noise samples subtracted from the converted digital representation. The multiple digital representations are then averaged, thereby nullifying differential nonlinearities in various portions of the transfer characteristics curve of the signal converter and reducing the effects of the DNL.

Abstract translation: 提供了用于降低模拟 - 数字信号转换器中的非线性的方法和装置。 将模拟伪随机噪声样本添加到模拟输入样本，并将组合的样本转换为数字表示。 从转换的数字表示中减去对应于模拟噪声样本的伪随机数字样本。 优选地，将多个模拟噪声样本添加到模拟输入样本，从转换的数字表示中减去转换和相应的数字噪声样本。 然后对多个数字表示进行平均，从而使信号转换器的传输特性曲线的各个部分中的微分非线性无效，并减少DNL的影响。

公开(公告)号：US07012772B1

公开(公告)日：2006-03-14

申请号：US09145524

申请日：1998-09-02

Applicant: Marvin L. Vis

Inventor： Marvin L. Vis

IPC: G11B5/09

CPC classification number: G11B20/10009 ,  G11B20/10037 ,  G11B20/10046 ,  G11B20/10333

Abstract: A sampled amplitude read channel is disclosed for magnetic disk storage systems comprising an adaptive non-linear correction circuit for correcting non-linear distortions in the read signal, such as asymmetry caused by the non-linear response of a magneto-resistive (MR) read head. The analog read signal is sampled and the discrete time sample values equalized into a desired partial response prior to sequence detection. The non-linear correction circuit is inserted into the read path prior to the sequence detector and adaptively tuned by a least-mean-square (LMS) adaptation circuit. In one embodiment, the non-linear correction circuit is a discrete-time Volterra filter comprising a linear response for implementing an equalizing filter, and a non-linear response for attenuating non-linear distortions in the read signal. The filter coefficients of both the linear and non-linear sections of the Volterra filter are adaptively adjusted by the LMS adaptation circuit. In an alternative embodiment, the non-linear correction circuit operates in the analog domain, prior to the sampling device, where the cost and complexity can be minimized. The analog correction circuit implements an inverse response to that of the non-linearity in the read signal, and the response is adaptively tuned using an LMS update value computed in discrete-time for a Volterra filter, without actually implementing a Volterra filter. Further, the LMS update value for the analog correction circuit can be implemented using a simple squaring circuit.

Abstract translation: 公开了一种用于磁盘存储系统的采样幅度读取通道，其包括用于校正读取信号中的非线性失真的自适应非线性校正电路，例如由磁阻（MR）读取的非线性响应引起的不对称 头。 模拟读取信号被采样，并且在序列检测之前将离散时间采样值均衡为期望的部分响应。 非线性校正电路在序列检测器之前插入到读取路径中，并由最小均方（LMS）适配电路进行自适应调谐。 在一个实施例中，非线性校正电路是包括用于实现均衡滤波器的线性响应的离散时间沃尔泰拉滤波器，以及用于衰减读取信号中的非线性失真的非线性响应。 Volterra滤波器的线性和非线性部分的滤波器系数由LMS适配电路进行自适应调整。 在替代实施例中，非线性校正电路在采样设备之前在模拟域中操作，其中可以最小化成本和复杂性。 模拟校正电路实现与读取信号中的非线性相反的响应，并且使用在离散时间为沃尔泰拉滤波器计算的LMS更新值来自适应地调整响应，而不实际实现Volterra滤波器。 此外，可以使用简单的平方电路来实现模拟校正电路的LMS更新值。

公开(公告)号：US07000138B1

公开(公告)日：2006-02-14

申请号：US09876299

申请日：2001-06-07

Applicant: Sanjay Ramakrishna Pillay ,  Raghunath Krishna Rao ,  Hasibur Rahman ,  Girish Subramaniam

Inventor： Sanjay Ramakrishna Pillay ,  Raghunath Krishna Rao ,  Hasibur Rahman ,  Girish Subramaniam

IPC: G06F1/04

CPC classification number: G06F1/3203 ,  G06F1/324 ,  Y02D10/126

Abstract: An adaptive clock throttle 600 interfacing a clock generator 601 generating a high speed clock and a processing engine 602 operating in response to a processing clock. Adaptive clock throttle 600 generates a plurality of lower speed clocks from the high speed clock, estimates a duty cycle of the processing engine, and selectively gates one of the lower speed clocks to the processing engine as the processing clock to increase the duty cycle of the processing engine.

Abstract translation: 自适应时钟节流阀600，其连接产生高速时钟的时钟发生器601和响应于处理时钟操作的处理引擎602。 自适应时钟节流阀600从高速时钟产生多个较低速时钟，估计处理引擎的占空比，并且选择性地将处理引擎中的一个低速时钟作为处理时钟，以增加处理引擎的占空比 处理引擎。

公开(公告)号：US06993722B1

公开(公告)日：2006-01-31

申请号：US09499442

申请日：2000-02-07

Applicant: Frank Greer ,  Sean Priddy ,  Rafael Heredia

Inventor： Frank Greer ,  Sean Priddy ,  Rafael Heredia

IPC: G11B27/00 ,  G06F3/00

CPC classification number: G11B19/025 ,  G06F3/0238 ,  G06F3/04886 ,  G06F3/0489 ,  G11B19/027 ,  H04N5/4401 ,  H04N5/4403 ,  H04N21/4221 ,  H04N21/42221 ,  H04N21/42646 ,  H04N21/42676 ,  H04N21/4316 ,  H04N21/43632 ,  H04N21/443 ,  H04N21/47217 ,  H04N21/478 ,  H04N21/4781 ,  H04N21/4782 ,  H04N21/4786 ,  H04N21/4788 ,  H04N21/4821 ,  H04N21/485 ,  H04N21/4882 ,  H04N2005/4435

Abstract: A user interface system, method and computer program product permits selection of predetermined device application modes in a television set system and checking the activation status of other application modes. If active modes are identified which are incompatible with the selected active mode, then these other active modes are halted. If compatible active modes are identified, then these remain concurrently active, with particularized adaptations being made. The user interface is particularly adapted for use with a set-top box environment using a TV set as a user display.

Abstract translation: 用户接口系统，方法和计算机程序产品允许在电视机系统中选择预定的设备应用模式并检查其他应用模式的激活状态。 如果识别出与所选择的活动模式不兼容的活动模式，那么这些其他活动模式将被停止。 如果识别出兼容的活动模式，那么这些模式将保持同时活动，并进行特殊的调整。 用户界面特别适用于使用电视机作为用户显示器的机顶盒环境。

公开(公告)号：US20060008251A1

公开(公告)日：2006-01-12

申请号：US11089458

申请日：2005-03-25

Applicant: Aravind Agrahara

Inventor： Aravind Agrahara

IPC: H04N5/781

CPC classification number: H04N5/85 ,  G11B27/105 ,  G11B27/11 ,  G11B2220/2562 ,  G11B2220/2579 ,  G11B2220/65 ,  H04N9/8042

Abstract: A “tag” is attached to streaming video data as it is streamed from the streaming layer to the presentation engine. Each frame containing a button or other user feature also has a “tag” associated with it. When the presentation engine processes a packet of data, it updates a state variable with the tag associated with the packet of data. The streaming layer can query this state variable at any point to get the tag associated with the currently rendered unit. When the user clicks on a button or feature, the streaming layer, rather than utilizing an associated operation in the data being streamed, instead uses the tag associated with the frame being displayed and then takes the appropriate action. The invention may also be used to provide frame-accurate editing features to allow streaming video data to be indexed or reversed to a frame-accurate level.

Abstract translation: 当流式传输视频数据从流式传输层流传输到演示引擎时，“标签”被附加到流媒体视频数据上。 包含按钮或其他用户功能的每个框架也具有与之相关联的“标签”。 当呈现引擎处理数据包时，它使用与数据包相关联的标签来更新状态变量。 流层可以在任何点查询该状态变量，以获得与当前渲染单元相关联的标签。 当用户点击按钮或特征时，流层不是利用正在流式传输的数据中的关联操作，而是使用与所显示的帧相关联的标签，然后采取适当的动作。 本发明还可以用于提供帧精确的编辑特征，以允许流视频数据被索引或反转到帧准确的级别。