公开(公告)号：US12164316B2

公开(公告)日：2024-12-10

申请号：US18119535

申请日：2023-03-09

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics France ,  STMicroelectronics (Alps) SAS

Inventor： Alexandre Tramoni ,  Florent Sibille ,  Patrick Arnould

IPC: H04B5/79 ,  G05F1/46

Abstract: An electronic device includes a near-field communication module and a powering circuit for delivering a power supply voltage to the near-field communication module. When the near-field communication module is in a low power mode, the powering circuit is configured for an operational mode where it is periodically started to provide the power supply voltage.

公开(公告)号：US20240272231A1

公开(公告)日：2024-08-15

申请号：US18437475

申请日：2024-02-09

Applicant: STMicroelectronics (Alps) SAS

Inventor： Daniel Ladret

IPC: G01R31/388 ,  G01R31/378 ,  G01R31/389

CPC classification number: G01R31/388 ,  G01R31/378 ,  G01R31/389

Abstract: In one embodiment, a method can be used for measuring an effective capacity of a battery. A first measurement is performed during a phenomenon of relaxation of the battery. The first measurement measures a first voltage delivered by the in-use battery from a duration. The duration is the difference between a first initial time and a second time that is defined as the time when a first line reaches a second voltage delivered by the battery when the battery is relaxed, the first line being tangent to the origin of a curve corresponding to the evolution over time of a voltage delivered by the battery during the phenomenon of relaxation.

公开(公告)号：US12039092B2

公开(公告)日：2024-07-16

申请号：US17544038

申请日：2021-12-07

Applicant: STMicroelectronics France ,  STMicroelectronics (Alps) SAS

Inventor： Julien Goulier ,  Pascal Bernon

IPC: G06F21/75 ,  H03K3/037 ,  H03K3/84

CPC classification number: G06F21/755 ,  H03K3/037 ,  H03K3/84

Abstract: The present description concerns an integrated circuit including, between first and second terminals having a first voltage applied therebetween, a load configured to execute instructions, a circuit for delivering a digital signal having at least two bits from a binary signal and a current output digital-to-analog converter controlled by the digital signal and coupled between the first and second terminals in parallel with the load.

公开(公告)号：US12028639B2

公开(公告)日：2024-07-02

申请号：US17649858

申请日：2022-02-03

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Nicolas Moeneclaey ,  Samuel Foulon

IPC: H04N25/778 ,  G01J1/42 ,  G01J1/44 ,  H04N25/772

CPC classification number: H04N25/778 ,  G01J1/4204 ,  G01J1/44 ,  H04N25/772

Abstract: A photosensitive device includes a peripheral circuit semiconductor region, a photosensitive circuit semiconductor region including at least one group of at least two photosensitive elements configured to generate a photoelectric signal on a node called critical node. The device further includes an integrator circuit per group of photosensitive elements, each including: a differential circuit for each photosensitive element of the group, in the photosensitive circuit semiconductor region, an amplification circuit, in the peripheral circuit semiconductor region, and a feedback circuit for each photosensitive element of the group, comprising a capacitive element located in the photosensitive circuit semiconductor region coupled between the output node of the amplification circuit and the respective critical node.

公开(公告)号：US12009572B2

公开(公告)日：2024-06-11

申请号：US17742039

申请日：2022-05-11

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Romain Coffy ,  Georg Kimmich

IPC: H01Q1/22 ,  H01Q1/38 ,  H01Q1/42 ,  H01Q13/18

CPC classification number: H01Q1/2283 ,  H01Q1/38 ,  H01Q1/422 ,  H01Q13/18

Abstract: A package includes an upper level mounted to a lower level. The upper level includes a stack formed by insulating layers and conductive elements and includes a first conductive track of an antenna. A plastic element rests on the stack. A first cavity is defined in the plastic element. A second conductive track of the antenna is located on a wall of the plastic element (for example, in or adjacent to the first cavity). A second cavity is also defined in the plastic element surrounding the first cavity. A third conductive track of the antenna is located on a wall of the plastic element (for example, in the second cavity). A third cavity is delimited between the upper and lower levels and an integrated circuit chip is mounted within the third cavity and electrically connected to the antenna.

公开(公告)号：US20240136927A1

公开(公告)日：2024-04-25

申请号：US18485634

申请日：2023-10-12

Applicant: STMicroelectronics (Alps) SAS

Inventor： Vratislav Michal

IPC: H02M3/158 ,  H02M1/088

CPC classification number: H02M3/158 ,  H02M1/088

Abstract: A power conversion circuit includes a first branch having a first switch and a second switch electrically connected to each other in series between a first node and a second node. An inductive element has a first terminal connected to a mid-point of the first and second switches. A capacitor has a first electrode coupled to the first node. A third node is configured to receive a first voltage, and the first voltage is referenced to the second node. A third switch is configured to electrically connect the third node to a second terminal of the inductive element.

公开(公告)号：US20240136814A1

公开(公告)日：2024-04-25

申请号：US18490809

申请日：2023-10-19

Applicant: STMicroelectronics (Alps) SAS

Inventor： Patrick Arnould

IPC: H02J1/08 ,  G06F1/26

CPC classification number: H02J1/086 ,  G06F1/266

Abstract: A near field communication controller integrated circuit includes a power management circuit configured to retransmit an external supply voltage from at least one power supply input node to at least one power supply output node in a bypass power supply mode. The power management circuit is hardware configured to automatically enable the bypass power supply mode in response to the external supply voltage being present at the at least one power supply input node.

公开(公告)号：US20240126315A1

公开(公告)日：2024-04-18

申请号：US18461950

申请日：2023-09-06

Applicant: STMicroelectronics (Alps) SAS

Inventor： Alexandre Pons

IPC: G05F1/575 ,  G05F1/56

CPC classification number: G05F1/575 ,  G05F1/561

Abstract: The present disclosure relates to a device having a supply input receiving a supply voltage, a switched-mode power supply comprising an output at which is generated a supply voltage, and a voltage linear regulator supplying a load, the regulator receiving the supply voltages, the regulator including two transistors coupled between the supply input, respectively the output of the supply, and an output node of the regulator. When the current drawn by the load is below a threshold, an output current delivered to the load is equal to a current flowing through the transistor, so that, when the current drawn by the load is above the threshold, the output current is equal to a current flowing through the transistor plus a current flowing through the transistor.

公开(公告)号：US11962462B2

公开(公告)日：2024-04-16

申请号：US18321516

申请日：2023-05-22

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Nicolas Anquet ,  Loic Pallardy

IPC: H04L41/0803 ,  G06F15/173 ,  G06F15/177 ,  H04L41/0813 ,  H04L49/109 ,  G06F21/85

CPC classification number: H04L41/0813 ,  G06F15/17306 ,  G06F15/177 ,  H04L41/0803 ,  H04L49/109 ,  G06F21/85

Abstract: System on a chip, comprising several master pieces of equipment, several slave resources, an interconnection circuit capable of routing transactions between master pieces of equipment and slave resources, and a processing unit at least configured to allow a user of the system on a chip to implement within the system on a chip at least one configuration diagram of this system defined by a set of configuration pieces of information including at least one piece of identification information assigned to each master piece of equipment, The identification pieces of information are intended to be attached to all the transactions emitted by the corresponding master pieces of equipment, the set of configuration pieces of information not being used for addressing the slave resources receiving the transactions and being used to define an assignment of at least one piece of master equipment to at least some of the slave resources.

公开(公告)号：US11953546B2

公开(公告)日：2024-04-09

申请号：US18181128

申请日：2023-03-09

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Etienne Auvray ,  Tommaso Melis ,  Philippe Sirito-Olivier

IPC: G01R31/311 ,  G01R15/22 ,  G01R19/00 ,  G01R31/28

CPC classification number: G01R31/311 ,  G01R15/22 ,  G01R19/0084 ,  G01R31/2851

Abstract: According to one aspect, an integrated circuit includes: an electronic module configured to generate a voltage at an output, and an electronic control circuit coupled to an output of the electronic module, the electronic control circuit comprising an emissive electronic component. The electronic control circuit is configured to cause the emissive electronic component to emit light radiation as a function of a value of the voltage at the output of the electronic module relative to a value of an operating voltage of the electronic module, and the operating voltage is specific thereto during normal operation of this electronic module. The light radiation emitted by the emissive electronic component is configured to diffuse to an outer face of the integrated circuit.