Abstract:
A liquid crystal display device includes first and second substrates having an active region, data and gate pad portions, and gate and data link portions, a sealant pattern within a sealant region, at least one first dummy pattern provided between adjacent ones of the gate link portions, at least one second dummy pattern provided between adjacent ones of the data link portions, and a liquid crystal layer between the first and second substrates, wherein a width of each of the first and second dummy patterns is less than a width of the sealant pattern.
Abstract:
A touch panel device includes a wiring terminal, a flexible printed circuit film connected to the wiring terminal, an adhesion part corresponding to a location where the flexible printed circuit film is connected to the wiring terminal, and an adhesion-reinforcing part adjacent to the adhesion part for strengthening an adhesive bonding strength of the adhesion part.
Abstract:
A method for reducing an off-current of a field effect transistor in which two electrodes of the field effect transistor have fixed voltage values and the rest electrode has an alternating voltage value by an AC voltage pulse generator to form an off-stress near source and drain junctions in turn.
Abstract:
An organic electro-luminescent display device and a method of fabricating the same are disclosed in the present invention. The organic electro-luminescent display device includes a plurality of pixels on a substrate, a thin film transistor coupled to each pixel, an organic electro-luminescent device coupled to the thin film transistor, a packaging layer on the organic electro-luminescent device, wherein the packaging layer comprises first and second inorganic layers having opposite stresses, and a first organic layer between the first and second inorganic layers.
Abstract:
A liquid crystal display device includes a plurality of gate lines and data lines arranged horizontally and vertically, respectively, for defining a plurality of pixel areas; a plurality of switching devices formed at intersections of the gate lines and the data lines; and a pixel electrode formed in a pixel area connected to the switching device corresponding to the pixel area and partially overlapping the data lines adjacent to the corresponding pixel area, wherein a first parasitic capacitance generated by the pixel electrode overlapping a data line for the corresponding pixel area and a second parasitic capacitance generated the pixel electrode overlapping a data line for an adjacent pixel area are substantially equal to each other.
Abstract:
An organic electroluminescence device includes a first substrate, a first electrode layer formed over the first substrate, an organic light emitting layer formed over the first substrate, a second electrode layer formed over the organic light emitting layer, a second substrate, a seal pattern on an outer portion of the first substrate or the second substrate for forming a cell gap between the two substrates and for attaching the two substrates, and a plurality of cell gap maintaining structures located between the first substrate and the second substrate.
Abstract:
A transflective liquid crystal display device includes: first and second substrates facing and spaced apart from each other, the first and second substrates having reflective and transmissive portions; a first retardation film on an outer surface of the first substrate, the first retardation film having a first optical axis; a first polarizing plate on the first retardation film, the first polarizing plate having a first transmissive axis; a common electrode on an inner surface of the first substrate; a pixel electrode on an inner surface of the second substrate; a second retardation film on an outer surface of the second substrate, the second retardation film having a second optical axis; a second polarizing plate on the second retardation film, the second polarizing plate having a second transmissive axis; and a liquid crystal layer between the common electrode and the pixel electrode, the liquid crystal layer having a director, wherein the first optical axis has a first angle of null with respect to the first transmissive axis, the director has a second angle of 2nullnull45null with respect to the first transmissive axis, the second optical axis has a third angle of 3nullnull90null with respect to the first transmissive axis, and the second transmissive axis has a fourth angle of 4null with respect to the first transmissive axis.
Abstract:
A method for forming a pattern includes forming a resist pattern on a printing roll, printing a multi-stepped resist pattern on an etching object layer formed on a substrate by using the printing roll and etching the etching object layer by using the printed resist pattern as a mask.
Abstract:
An image quality analysis method and an image quality analysis system for a display device are provided. The image quality analysis method for a display device includes the steps of outputting an image pattern for analysis of an image quality of the display device, dividing a screen display region to which the image pattern is output into a plurality of sub-regions, producing measurement data representing the image quality with respect to each of the plurality of sub-regions, arranging the produced measurement data as a time series, obtaining a fractal dimension exponent from the data as a time series, and evaluating the fractal dimension exponent as a level of uniformity of the image quality of the display device.
Abstract:
A thin film transistor device includes a substrate, a buffer layer on the substrate, an active layer on the buffer layer, the active layer is formed of polycrystalline silicon and includes first undoped areas, a second lightly doped area, and third highly doped areas, a gate insulation layer on the buffer layer, a dual-gate electrode on the gate insulation layer including first and second gate electrodes corresponding to the first areas, an interlayer insulator on the gate insulation layer covering the dual-gate electrode, source and drain contact holes exposing the third areas, a gate contact hole penetrating the interlayer insulator to expose a portion of the dual-gate electrode, source and drain electrodes on the interlayer insulator contacting the third areas through the source and drain contact holes, and a third gate electrode on the interlayer insulator contacting the exposed portion of the dual-gate electrode through the gate contact hole.