公开(公告)号：US20240090272A1

公开(公告)日：2024-03-14

申请号：US18307817

申请日：2023-04-27

Applicant: Japan Display Inc.

Inventor： Hiroshi TABATAKE

IPC: H10K59/122 ,  H10K59/12

CPC classification number: H10K59/122 ,  H10K59/1201

Abstract: According to one embodiment, a method of manufacturing a display device, includes forming a lower electrode on a base, forming a rib which covers a part of the lower electrode, forming a partition including a lower portion disposed on the rib and an upper portion protruding from a side surface of the lower portion, removing the upper portion of at least a part of the partition, measuring a first width of the lower portion of the partition and a second width of the upper portion of the partition and measuring a distance between the side surface of the lower portion and an end portion of the upper portion based on the first and second widths.

公开(公告)号：US20240088302A1

公开(公告)日：2024-03-14

申请号：US18465251

申请日：2023-09-12

Applicant: Japan Display Inc.

Inventor： Takaya TAMARU ,  Masashi TSUBUKU ,  Hajime WATAKABE ,  Toshinari SASAKI

IPC: H01L29/786

CPC classification number: H01L29/7869

Abstract: A semiconductor device according to an embodiment includes: a substrate; a metal oxide layer arranged above the substrate and having aluminum as the main component of the metal oxide layer; an oxide semiconductor layer arranged above the metal oxide layer; a gate electrode facing the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode, wherein a thickness of the metal oxide layer is 1 nm or more and 4 nm or less.

公开(公告)号：US20240088192A1

公开(公告)日：2024-03-14

申请号：US18515288

申请日：2023-11-21

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Akihiro HANADA ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Fumiya KIMURA ,  Isao SUZUMURA

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14636 ,  H01L27/14689

Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.

公开(公告)号：US20240088164A1

公开(公告)日：2024-03-14

申请号：US18244081

申请日：2023-09-08

Applicant: Japan Display Inc

Inventor： Nobutaka OZAKI ,  Yoshitaka OZEKI ,  Koshiro MORIGUCHI

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/124 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/1368

Abstract: A display device including a plurality of pixels arranged in a matrix on a substrate along a first direction and a second direction intersecting the first direction, wherein each of the plurality of pixels includes a transistor, a first transparent conductive layer arranged over the transistor and electrically connected to the transistor, a first insulating layer arranged over the first transparent conductive layer, a second transparent conductive layer arranged in the first insulating layer and electrically connected to the first transparent conductive layer via an opening extending over the plurality of pixels arranged in line in the first direction, a filling member arranged over the second transparent conductive layer to fill the interior of the opening, a third transparent conductive layer arranged on the first insulating layer and the filling member, and a metal layer in contact with the third transparent electrode.

公开(公告)号：US11930591B2

公开(公告)日：2024-03-12

申请号：US17457059

申请日：2021-12-01

Applicant: Japan Display Inc.

Inventor： Takumi Sano

IPC: H05K1/02

CPC classification number: H05K1/028

Abstract: According to one embodiment, a flexible substrate includes a support plate including a first surface, a line portion located on the first surface and including a first side surface and a second side surface on an opposite side to the first side surface and a protective member which covers the line portion, in contact with the first surface. The line portion includes a flexible insulating base located on the first surface and a wiring layer disposed on the insulating base, the protective member is separated from at least a part of the first side surface via an air layer and from at least a part of the second side surface via an air layer, and the air layers extend along the line portion.

公开(公告)号：US11927869B2

公开(公告)日：2024-03-12

申请号：US17451339

申请日：2021-10-19

Applicant: Japan Display Inc.

Inventor： Hirotaka Hayashi

IPC: G02F1/16766 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/167 ,  G02F1/16757 ,  H01L27/12 ,  H01L29/786

CPC classification number: G02F1/16766 ,  G02F1/133345 ,  G02F1/136227 ,  G02F1/167 ,  G02F1/16757 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

Abstract: According to one embodiment, a semiconductor substrate, comprising, a first semiconductor layer and a second semiconductor layer that overlap a scanning line, an insulating layer that covers the first semiconductor layer and the second semiconductor layer, and a signal line, wherein the insulating layer has a first opening including a pair of long sides and a pair of short sides, the long sides of the first opening are parallel to the second direction, and the short sides of the first opening are parallel to the first direction, and the signal line is connected to the first semiconductor layer and the second semiconductor layer via the first opening.

公开(公告)号：US20240081095A1

公开(公告)日：2024-03-07

申请号：US18387080

申请日：2023-11-06

Applicant: Japan Display Inc.

Inventor： Akinori KAMIYA

IPC: H10K50/844 ,  H10K50/11 ,  H10K50/15 ,  H10K50/16 ,  H10K50/17 ,  H10K50/828 ,  H10K50/856 ,  H10K59/12 ,  H10K59/122 ,  H10K71/00

CPC classification number: H10K50/844 ,  H10K50/11 ,  H10K50/15 ,  H10K50/16 ,  H10K50/17 ,  H10K50/171 ,  H10K50/828 ,  H10K50/856 ,  H10K59/12 ,  H10K59/122 ,  H10K71/00 ,  H10K50/84

Abstract: The organic electroluminescence display device of an embodiment of the present invention includes a substrate, a plurality of pixels formed on the substrate, and a sealing film that covers the plurality of pixels. The sealing film includes a first barrier layer, a base layer covering the top surface of the first barrier layer, an inter layer locally formed on the top surface of the base layer, and a second barrier layer covering the top surface of the base layer and the top surface of the inter layer. The inter layer is formed so as to cover a step on the top surface of the base layer.

公开(公告)号：US20240077774A1

公开(公告)日：2024-03-07

申请号：US18459444

申请日：2023-09-01

Applicant: Japan Display Inc.

Inventor： Kentaro KAWAI

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1334 ,  G02F1/1335 ,  G02F1/1345 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/133357 ,  G02F1/1334 ,  G02F1/133512 ,  G02F1/13452 ,  G02F1/136227 ,  H01L27/124

Abstract: A display device includes an array substrate including a display region arranged with pixels and a peripheral region outside the display region, a counter substrate facing the array substrate, and a liquid crystal layer between the array substrate and the counter substrate. The display region includes a plurality of scanning signal lines extending in a first direction and arranged in a second direction intersecting the first direction, and a plurality of data signal lines extending in the second direction and arranged in the first direction. The peripheral region comprises a first wiring pattern having a first grid pattern formed with a plurality of first wirings connecting the plurality of scanning signal lines and a scanning signal line driver circuit and a plurality of dummy wirings, and a second wiring pattern having a second grid pattern formed with second wirings to be applied with a certain potential.

公开(公告)号：US20240077768A1

公开(公告)日：2024-03-07

申请号：US18506522

申请日：2023-11-10

Applicant: Japan Display Inc.

Inventor： Kojiro IKEDA ,  Takeo KOITO

IPC: G02F1/1343 ,  G02F1/1347

CPC classification number: G02F1/134309 ,  G02F1/1347

Abstract: An optical element includes first to fourth liquid crystal cells. Each of the first to fourth liquid crystal cells includes a first substrate on which a first pair of comb-shaped transparent electrodes are arranged and a second substrate on which a second pair of comb-shaped transparent electrodes are arranged. An extending direction of the first pair of comb-shaped transparent electrodes is orthogonal to an extending direction of the second pair of comb-shaped transparent electrodes. Between two different liquid crystal cells of the first to fourth liquid crystal cells, one of the first pair of comb-shaped transparent electrodes of one liquid crystal cell and one of the second pair of comb-shaped transparent electrodes of the other liquid crystal cell are electrically connected to each other.

公开(公告)号：US20240074248A1

公开(公告)日：2024-02-29

申请号：US18495815

申请日：2023-10-27

Applicant: Japan Display Inc.

Inventor： Shinichi KAWAMURA ,  Nobuo IMAI ,  Hiroshi OGAWA

IPC: H10K59/122 ,  H10K59/80

CPC classification number: H10K59/122 ,  H10K59/8051 ,  H10K59/8052 ,  H10K71/231

Abstract: According to one embodiment, a display device comprises a first lower electrode, a rib including a first pixel aperture, a partition including a lower portion on the rib and an upper portion protruding from a side surface of the lower portion, a first upper electrode, and a first organic layer between the first lower electrode and the first upper electrode. The lower portion includes a bottom layer and a stem layer on the bottom layer. The bottom layer is formed of a material which has a smaller etching rate to a mixed acid containing phosphoric acid, nitric acid, and acetic acid than the stem layer and which is conductive.