公开(公告)号：US08624244B2

公开(公告)日：2014-01-07

申请号：US13346193

申请日：2012-01-09

Applicant: Reiko Noguchi ,  Kazunori Inoue ,  Masaru Aoki ,  Toshihiko Iwasaka

Inventor： Reiko Noguchi ,  Kazunori Inoue ,  Masaru Aoki ,  Toshihiko Iwasaka

IPC: H01L29/04 ,  H01L29/10 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L29/12 ,  H01L29/76 ,  H01L31/112 ,  H01L29/15

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733

Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, and a source electrode and a drain electrode placed on the semiconductor layer and electrically connected with the semiconductor layer. The semiconductor layer includes a light-transmitting semiconductor film and an ohmic conductive film placed on the light-transmitting semiconductor film and having a lower light transmittance than the light-transmitting semiconductor film. The ohmic conductive film is formed not to protrude from the light-transmitting semiconductor film. The ohmic conductive film is formed in separate parts with a channel part between the source electrode and the drain electrode interposed therebetween. The source electrode and the drain electrode are connected to the light-transmitting semiconductor film through the ohmic conductive film.

Abstract translation: 薄膜晶体管包括栅电极，半导体层以及放置在半导体层上并与半导体层电连接的源电极和漏电极。 半导体层包括透光半导体膜和放置在透光半导体膜上并具有比透光半导体膜低的透光率的欧姆导电膜。 形成欧姆导电膜不会从透光半导体膜突出。 欧姆导电膜以分离的部分形成在源电极和漏电极之间的通道部分之间。 源电极和漏电极通过欧姆导电膜连接到透光半导体膜。

公开(公告)号：US20120305911A1

公开(公告)日：2012-12-06

申请号：US13480980

申请日：2012-05-25

Applicant: Toshihiko IWASAKA ,  Kazunori INOUE ,  Masaru AOKI ,  Reiko NOGUCHI

Inventor： Toshihiko IWASAKA ,  Kazunori INOUE ,  Masaru AOKI ,  Reiko NOGUCHI

IPC: H01L33/08 ,  H01L33/28

CPC classification number: H01L27/1255 ,  H01L27/1225 ,  H01L27/1288

Abstract: Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.

Abstract translation: 本发明提供一种薄膜晶体管，其具有设置在半导体膜上的与半导体膜接触的基板，源电极和漏电极的多个部分中的半导体膜，并且彼此间隔开;以及 栅极电极，其经由栅极绝缘膜设置在所述源极电极和所述漏极电极之间; 辅助电容电极，与半导体膜接触地设置在半导体膜上; 在下层具有半导体膜的源极线从源电极延伸; 从栅电极延伸的栅极线; 与漏电极电连接的像素电极; 以及在相邻像素中将辅助电容电极彼此电连接的辅助电容电极连接线。

公开(公告)号：US20120241211A1

公开(公告)日：2012-09-27

申请号：US13419253

申请日：2012-03-13

Applicant: Kazunori INOUE ,  Tsutomu MIYASHITA ,  Kazuhiro MATSUMOTO

Inventor： Kazunori INOUE ,  Tsutomu MIYASHITA ,  Kazuhiro MATSUMOTO

IPC: H01L23/02 ,  H05K13/00

CPC classification number: H03H9/6483 ,  H01L2224/16 ,  H01L2224/73204 ,  H03H9/1064 ,  Y10T29/49124

Abstract: An electronic component includes: a substrate; a functional portion provided on the substrate; an interconnection line provided on the substrate and electrically connected to the functional portion; a metal wall provided on the substrate so as to surround the functional portion and the interconnection line; and a seal portion that contacts the metal wall and covers the functional portion and the interconnection line so as to define a cavity above the functional portion, the seal portion being made of liquid polymer.

Abstract translation: 电子部件包括：基板; 设置在所述基板上的功能部; 布线，设置在所述基板上并与所述功能部电连接; 金属壁，设置在所述基板上，以围绕所述功能部分和所述互连线; 以及密封部分，其与所述金属壁接触并且覆盖所述功能部分和所述互连线以便在所述功能部分上方限定空腔，所述密封部分由液体聚合物制成。

公开(公告)号：US20120187393A1

公开(公告)日：2012-07-26

申请号：US13346193

申请日：2012-01-09

Applicant: Reiko NOGUCHI ,  Kazunori Inoue ,  Masaru Aoki ,  Toshihiko Iwasaka

Inventor： Reiko NOGUCHI ,  Kazunori Inoue ,  Masaru Aoki ,  Toshihiko Iwasaka

IPC: H01L33/08

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733

Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, and a source electrode and a drain electrode placed on the semiconductor layer and electrically connected with the semiconductor layer. The semiconductor layer includes a light-transmitting semiconductor film and an ohmic conductive film placed on the light-transmitting semiconductor film and having a lower light transmittance than the light-transmitting semiconductor film. The ohmic conductive film is formed not to protrude from the light-transmitting semiconductor film. The ohmic conductive film is formed in separate parts with a channel part between the source electrode and the drain electrode interposed therebetween. The source electrode and the drain electrode are connected to the light-transmitting semiconductor film through the ohmic conductive film.

Abstract translation: 薄膜晶体管包括栅电极，半导体层以及放置在半导体层上并与半导体层电连接的源电极和漏电极。 半导体层包括透光半导体膜和放置在透光半导体膜上并具有比透光半导体膜低的透光率的欧姆导电膜。 形成欧姆导电膜不会从透光半导体膜突出。 欧姆导电膜以分离的部分形成在源电极和漏电极之间的通道部分之间。 源电极和漏电极通过欧姆导电膜连接到透光半导体膜。

公开(公告)号：US08222972B2

公开(公告)日：2012-07-17

申请号：US12712144

申请日：2010-02-24

Applicant: Kazunori Inoue ,  Takashi Matsuda ,  Michio Miura ,  Suguru Warashina

Inventor： Kazunori Inoue ,  Takashi Matsuda ,  Michio Miura ,  Suguru Warashina

IPC: H03H9/46

CPC classification number: H03H9/0222 ,  H03H9/02897 ,  H03H9/02929 ,  H03H9/02937 ,  H03H9/02984 ,  H03H9/02992 ,  Y10T29/49005

Abstract: An acoustic wave element includes: resonators 2 each including an electrode to excite acoustic waves; a power supply wiring portion 3 that is disposed so as to connect the resonators 2 electrically; a piezoelectric substrate 4 on which the resonators 2 and the power supply wiring portion 3 are formed; a second medium 5 that is formed on the piezoelectric substrate 4 so as to cover the resonators 2; and a third medium 6 that is formed on the piezoelectric substrate 4 so as to cover at least the second medium 5 and the power supply wiring portion 3. A side surface 34 of the power supply wiring portion 3 that is in contact with a surface of the piezoelectric substrate 4 forms an obtuse first angle θ with respect to the surface 4a of the piezoelectric substrate 4.

Abstract translation: 声波元件包括：各自包括用于激发声波的电极的谐振器2; 设置为电连接谐振器2的电源配线部3; 形成有谐振器2和电源配线部3的压电基板4; 形成在压电基板4上以覆盖谐振器2的第二介质5; 以及形成在压电基板4上以至少覆盖第二介质5和电源配线部3的第三介质6.电源配线部3的与表面接触的侧面34 压电基板4形成钝角的第一角度＆amp; 相对于压电基板4的表面4a。

公开(公告)号：US20120176206A1

公开(公告)日：2012-07-12

申请号：US13425001

申请日：2012-03-20

Applicant: Kazunori INOUE ,  Jun TSUTSUMI ,  Kazuhiro MATSUMOTO ,  Takashi MATSUDA

Inventor： Kazunori INOUE ,  Jun TSUTSUMI ,  Kazuhiro MATSUMOTO ,  Takashi MATSUDA

IPC: H03H9/76 ,  H05K13/00 ,  H03H9/25

CPC classification number: H03H9/706 ,  H03H3/02 ,  H03H3/08 ,  H03H9/02125 ,  H03H9/02913 ,  H03H9/02952 ,  H03H9/568 ,  H03H9/6483 ,  H03H9/725 ,  Y10T29/49155

Abstract: An acoustic wave filter includes: a substrate; resonators that are arranged on the substrate and excite acoustic waves; a ground terminal on the substrate; interconnection lines interconnecting the resonators and connecting predetermined ones of the resonators to the ground terminal; and a shield electrode disposed so as to be close to and face the interconnection lines.

Abstract translation: 声波滤波器包括：基板; 谐振器布置在衬底上并激发声波; 衬底上的接地端子; 将所述谐振器互连并将所述谐振器中的预定谐振器连接到所述接地端子的互连线; 以及设置成靠近并面对互连线的屏蔽电极。

公开(公告)号：USD661868S1

公开(公告)日：2012-06-19

申请号：US29394154

申请日：2011-06-14

Applicant: Yasushi Takeda ,  Yuji Makihara ,  Kazunori Inoue ,  Yosuke Kobayashi

Designer： Yasushi Takeda ,  Yuji Makihara ,  Kazunori Inoue ,  Yosuke Kobayashi

公开(公告)号：US20120112194A1

公开(公告)日：2012-05-10

申请号：US13232251

申请日：2011-09-14

Applicant: Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

Inventor： Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

IPC: H01L33/08

CPC classification number: H01L29/458 ,  H01L29/42384 ,  H01L29/66765

Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.

Abstract translation: 本发明的目的是提供一种即使在没有形成高熔点金属阻挡层的情况下也可以改善高温处理后的电特性的技术。 半导体器件包括形成在透明绝缘基板上的栅极电极，具有Si半导体活性膜的半导体层和具有n型导电性的欧姆低电阻Si膜依次形成在具有栅绝缘层的栅电极上 插入在栅电极和半导体层之间的膜，以及直接连接到半导体层并且至少包含铝（Al）的源极和漏极。 在SI半导体活性膜的侧面与源电极和漏极之间的界面附近的第一区域中至少含有氮（N）。

公开(公告)号：US20110017993A1

公开(公告)日：2011-01-27

申请号：US12831658

申请日：2010-07-07

Applicant: Kumi TSUDA ,  Kazunori Inoue ,  Masaru Aoki

Inventor： Kumi TSUDA ,  Kazunori Inoue ,  Masaru Aoki

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/4908 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384

Abstract: There is provided a TFT substrate including a gate electrode having a thick film part and a thin film part with a smaller film thickness than the thick film part, a semiconductor active film formed above the thick film part and the thin film part of the gate electrode, an ohmic contact film formed on an inside of the semiconductor active film and on the semiconductor active film corresponding to the thin film part on an outside of the thick film part, and an electrode film constituting a source electrode and a drain electrode, having a planar shape identical to or on an inside of the ohmic contact film, and formed on the ohmic contact film.

Abstract translation: 提供了一种TFT基板，包括具有厚膜部分的栅电极和具有比厚膜部分更薄的膜厚度的薄膜部分，形成在厚膜部分上方的半导体活性膜和栅电极的薄膜部分 形成在半导体有源膜的内侧上的半导体有源膜上的欧姆接触膜和对应于厚膜部的外侧的薄膜部的半导体活性膜，以及构成源电极和漏电极的电极膜，具有 平面形状与欧姆接触膜的内部相同或在其内部，并形成在欧姆接触膜上。

公开(公告)号：US20110012121A1

公开(公告)日：2011-01-20

申请号：US12887865

申请日：2010-09-22

Applicant: KAZUNORI INOUE ,  Harumi Murakami ,  Toshio Araki ,  Nobuaki Ishiga

Inventor： KAZUNORI INOUE ,  Harumi Murakami ,  Toshio Araki ,  Nobuaki Ishiga

IPC: H01L33/08

CPC classification number: G02F1/1341 ,  G02F1/1345 ,  G02F1/136213 ,  G02F2201/121 ,  H01L27/124 ,  H01L27/1248

Abstract: A display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate has a counter electrode, and the TFT array substrate has a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.

Abstract translation: 一种显示装置，包括阵列中形成有TFT的TFT阵列基板，与TFT阵列基板相对配置的对置基板和用于将TFT阵列基板和对置基板粘合的密封图案，其中， 相对基板具有对电极，TFT阵列基板具有第一导电层，形成在第一导电层上的第一绝缘膜，经由第一绝缘膜与第一导电层相交的第二导电层，第二导电层 形成在第二导电层上并且具有至少两层的绝缘膜，以及设置在密封图案下方并通过密封图案电连接到对电极的公共电极布线，并且密封图案经由第二绝缘膜与第二导电层重叠 。