公开(公告)号：US20120193989A1

公开(公告)日：2012-08-02

申请号：US13071533

申请日：2011-03-25

Applicant: Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

Inventor： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC: H02J3/04

CPC classification number: G05F1/67 ,  Y10T307/685

Abstract: In a solar panel array that includes a string of series-connected panels, the load current flowing through the string is measured. The peak current (Ipp) of a panel in the string is determined. A current equal to the difference of the load current and the peak current (Ipp) is generated in a current source connected across the output terminals of the panel. The panel is thereby operated at its maximum power point (MPP). To determine the peak current (Ipp) of the panel, the magnitude of current flowing through the panel is iteratively changed and the corresponding power generated by the panel is computed. The change in the current through the panel and the measurement of the corresponding power are repeated until a maximum power is determined as being generated by the panel. The maximum power corresponds to the maximum power point (MPP) and the peak current (Ipp) of the panel.

Abstract translation: 在包括一系列串联连接的面板的太阳能电池板阵列中，测量流过该串的负载电流。 确定字符串中面板的峰值电流（Ipp）。 在连接在面板的输出端子上的电流源中产生等于负载电流和峰值电流（Ipp）差的电流。 因此，面板以其最大功率点（MPP）运行。 为了确定面板的峰值电流（Ipp），流过面板的电流的大小被迭代地改变，并且计算面板产生的对应的功率。 重复通过面板的电流的变化和对应的功率的测量，直到最大功率被确定为由面板产生。 最大功率对应于面板的最大功率点（MPP）和峰值电流（Ipp）。

公开(公告)号：US20090278516A1

公开(公告)日：2009-11-12

申请号：US12436136

申请日：2009-05-06

Applicant: Hrishikesh BHAGWAT ,  Rupak GHAYAL ,  Saumitra SINGH ,  Pawan GUPTA ,  Prakash EASWARAN

Inventor： Hrishikesh BHAGWAT ,  Rupak GHAYAL ,  Saumitra SINGH ,  Pawan GUPTA ,  Prakash EASWARAN

IPC: G05F1/10

CPC classification number: H02M3/1588 ,  Y02B70/1466

Abstract: A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.

Abstract translation: 用于开关器件的瞬态恢复电路。 瞬态恢复电路包括检测电路，用于通过检测输出电压瞬变的速率来检测开关装置的输出电压中的快速瞬变; 所述开关装置的反馈环路中的辅助控制电路，用于通过在检测到所述快速瞬变时改变所述反馈回路的带宽来校正所述输出电压; 以及用于在校正输出电压之后将连续导通模式中的反馈回路初始化为期望工作点的初始化电路。

公开(公告)号：US07327997B2

公开(公告)日：2008-02-05

申请号：US10711724

申请日：2004-09-30

Applicant: Gaurav Chandra ,  Preetam Charan Anand Tadeparthy ,  Prakash Easwaran

Inventor： Gaurav Chandra ,  Preetam Charan Anand Tadeparthy ,  Prakash Easwaran

IPC: H04B1/10

CPC classification number: H03H11/126 ,  H04B1/16

Abstract: A trans-impedance filter circuit provided according to an aspect of the present invention contains an operational amplifier, a first resistor, a first capacitor, a second resistor, and a second capacitor. The second capacitor is connected in parallel between the inverting input terminal and an output path of the operational amplifier. The second resistor is connected between the output terminal of the operational amplifier and a second node on a path connecting the input signal to the inverting input terminal. The first resistor is coupled between the first node and inverting input terminal of the operational amplifier. The first capacitor is coupled between the first node and Vss. Due to such connections, the filter circuit operates as a second order filter circuit, thereby providing a desired high level of filtering. Also, as the filter circuit is implemented with a single operational amplifier, the power and area requirements are reduced.

Abstract translation: 根据本发明一方面提供的跨阻抗滤波器电路包括运算放大器，第一电阻器，第一电容器，第二电阻器和第二电容器。 第二电容器并联连接在反相输入端和运算放大器的输出路径之间。 第二电阻器连接在运算放大器的输出端和将输入信号连接到反相输入端的路径上的第二节点之间。 第一电阻耦合在运算放大器的第一节点和反相输入端之间。 第一电容器耦合在第一节点和Vss之间。 由于这种连接，滤波器电路作为二阶滤波器电路工作，从而提供期望的高级滤波。 而且，由于滤波器电路由单个运算放大器实现，所以功率和面积要求降低。

公开(公告)号：US20070205834A1

公开(公告)日：2007-09-06

申请号：US11366006

申请日：2006-02-28

Applicant: Prakash Easwaran ,  Anant Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Nayak ,  Sameer Joshi ,  Mithun Neelakant ,  Subhash Pai ,  Shivaprakash Halagur

Inventor： Prakash Easwaran ,  Anant Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Nayak ,  Sameer Joshi ,  Mithun Neelakant ,  Subhash Pai ,  Shivaprakash Halagur

IPC: H03L7/00

CPC classification number: H03L7/093 ,  E05Y2400/30 ,  H03L7/099 ,  H03L7/189

Abstract: Various systems and methods for drift compensation are disclosed. As one example, a system for compensating drift in a control circuit is disclosed that includes at least two control signals. One of the control signals is provided by a circuit that is susceptible to drift. This control signal is provided both to a systems or device under control, and to a detection circuit. The detection circuit is operable to detect a drift in the control signal. In addition, the detection circuit provides another control signal that varies as a function of the drift in the received control signal.

Abstract translation: 公开了用于漂移补偿的各种系统和方法。 作为一个示例，公开了一种用于补偿控制电路中的漂移的系统，其包括至少两个控制信号。 控制信号之一由容易漂移的电路提供。 该控制信号被提供给被控制的系统或设备，以及检测电路。 检测电路可操作以检测控制信号中的漂移。 此外，检测电路提供另一控制信号，该控制信号根据所接收的控制信号中的漂移而变化。

公开(公告)号：US20060103469A1

公开(公告)日：2006-05-18

申请号：US10904578

申请日：2004-11-17

Applicant: Gaurav CHANDRA ,  Prakash EASWARAN ,  Sumantra SETH

Inventor： Gaurav CHANDRA ,  Prakash EASWARAN ,  Sumantra SETH

IPC: H03F3/191

CPC classification number: H03F1/34 ,  H03G3/3052 ,  H03G5/24 ,  H03H11/126 ,  H03H11/1291

Abstract: A low distortion filter circuit implementing variable gain amplification (VGA). An aspect of the present invention increases the degrees of freedom (number of components which can be independently programmed/changed to corresponding desired values) to achieve a desired combination of D.C. gain and filter characteristics (e.g., corner frequency, Q-factor, notch frequency, etc.). Such additional degrees of freedom are attained by including additional components in either an input block or a feedback block (implemented with reference to an operational amplifier), and by redesigning the other block using principles such as admittance cancellation to remove the effects of such additional components. The blocks are designed such that a terminal of the programmable components is connected to a fixed/constant voltage (e.g., ground). Embodiments implementing bi-quad single amplifier with and without notch are disclosed.

Abstract translation: 实现可变增益放大（VGA）的低失真滤波电路。 本发明的一个方面增加了自由度（可以被独立地编程/改变为相应的期望值的分量的数量），以实现期望的DC增益和滤波器特性的组合（例如，转角频率，Q因子，陷波频率 等）。 这样的附加自由度通过将附加组件包括在输入块或反馈块（参考运算放大器实现）中来实现，并且通过使用诸如导纳消除之类的原理重新设计其他块来消除这些附加组件的影响 。 这些块被设计成使得可编程组件的端子连接到固定/恒定电压（例如，接地）。 公开了实现具有和没有陷波的双二极管单放大器的实施例。

公开(公告)号：US20060068741A1

公开(公告)日：2006-03-30

申请号：US10711680

申请日：2004-09-30

Applicant: Anant KAMATH ,  Gaurav CHANDRA ,  Prakash EASWARAN

Inventor： Anant KAMATH ,  Gaurav CHANDRA ,  Prakash EASWARAN

IPC: H04B1/10

CPC classification number: H04B1/30 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45136 ,  H03F2203/45526

Abstract: A receiver, implemented with low noise and low distortion, to process an input signal containing signals of interest and unwanted interference signal. In an embodiment, the receiver contains a mixer which generates an intermediate signal in the form of an electric current, and a filter which filters the unwanted interference signals from the intermediate signal. The intermediate signal is centered around a lower frequency compared to a crier frequency of the input signal. Due to the current mode interface between the mixer and the filter circuit, low noise and low distortion may be attended.

Abstract translation: 以低噪声和低失真实现的接收机，用于处理包含感兴趣信号和不想要的干扰信号的输入信号。 在一个实施例中，接收机包含以电流形式产生中间信号的混频器和从中间信号滤除不想要的干扰信号的滤波器。 与输入信号的频率相比，中间信号以较低频率为中心。 由于混频器和滤波电路之间的电流模式接口，可能会出现低噪声和低失真。

公开(公告)号：US06983032B2

公开(公告)日：2006-01-03

申请号：US09941002

申请日：2001-08-28

Applicant: Fernando A. Mujica ,  Udayan Dasgupta ,  Sandeep Kesrimal Oswal ,  Murtaza Ali ,  Pradeep Kiran Sarvepalli ,  Prakash Easwaran ,  Diptendra Narayan Basu

Inventor： Fernando A. Mujica ,  Udayan Dasgupta ,  Sandeep Kesrimal Oswal ,  Murtaza Ali ,  Pradeep Kiran Sarvepalli ,  Prakash Easwaran ,  Diptendra Narayan Basu

IPC: H03D3/24

CPC classification number: H04L7/0337 ,  H04L27/2657

Abstract: The present invention provides an apparatus, system and method for synchronizing a local clock signal with a remote clock signal in a communication network. Phase information is used to calculate a number of “clock jitters” per unit of time needed to synchronize the locally generated clock with the remote clock. Introducing (removing) a given amount of delay at a particular point in the local clock signal results in a positive (negative) jitter in which its minimum value defines the jitter resolution. The jitters are introduced to the local clock signal from a plurality of tapped delay line elements (310) selected by a phase selector (350) in response to a timing correction signal issued by a phase error module (520).

Abstract translation: 本发明提供了一种在本地时钟信号与通信网络中的远程时钟信号同步的装置，系统和方法。 相位信息用于计算在本地生成的时钟与远程时钟同步所需的每单位时间的“时钟抖动”数量。 在本地时钟信号的特定点引入（去除）给定量的延迟会导致正（负）抖动，其中最小值定义抖动分辨率。 响应于由相位误差模块（520）发出的定时校正信号，从由相位选择器（350）选择的多个抽头延迟线元件（310）中将抖动引入本地时钟信号。

公开(公告)号：US06914546B2

公开(公告)日：2005-07-05

申请号：US10837092

申请日：2004-04-29

Applicant: Prakash Easwaran ,  Mrinal Das

Inventor： Prakash Easwaran ,  Mrinal Das

IPC: H03M1/18 ,  H03M3/00 ,  H03M7/38 ,  H04B1/38

CPC classification number: H03M7/3015 ,  H03M7/3026 ,  H03M7/304

Abstract: A sigma delta modulator (350) can be utilized in the Digital-to-Analog (DAC) portion (144) of a modem (120) to achieve a desired level of gain programming. A set of step coefficients (GP2, GP4) are utilized to determined the step size and thereby the overall gain of the modulator (350). A feedback path is provided and configured to deliver the output of the modulator to a gain control block (355) which provides control and stability across the entire transmission bandwidth. A multilevel digital output (320) is provided which represents levels of signal in the digital domain and reduces the number of discrete components required to achieve a particular amount of gain.

Abstract translation: 可以在调制解调器（120）的数模（DAC）部分（144）中使用Σ-Δ调制器（350）以实现期望的增益编程级别。 利用一组步进系数（GP2，GP4）来确定步长，从而确定调制器（350）的整体增益。 反馈路径被提供和配置为将调制器的输出传递到增益控制块（355），增益控制块（355）在整个传输带宽上提供控制和稳定性。 提供了多级数字输出（320），其表示数字域中的信号电平，并且减少了实现特定增益量所需的离散组件的数量。

公开(公告)号：US20120193986A1

公开(公告)日：2012-08-02

申请号：US13071531

申请日：2011-03-25

Applicant: Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

Inventor： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC: H02J1/00

CPC classification number: G05F1/67 ,  H01L31/05 ,  H01L31/0504 ,  H02J3/385 ,  H02S50/10 ,  Y02E10/50 ,  Y02E10/58 ,  Y10T307/609 ,  Y10T307/685

Abstract: In a solar panel array, each solar panel in a series-connected string has a current source connected across its output terminals. The current source generates a programmable output current equal to the difference of the load current drawn from the panel and the current corresponding to the maximum power point (MPP) of the panel. As a result, each of the panels in the string is operated at its MPP. When the array contains multiple strings connected in parallel, a voltage source is additionally connected in series with each string. The voltage sources are programmable to generate corresponding output voltages to enable operation of each panel in each of the multiple strings at its MPP. Respective control blocks providing the current sources and voltage sources automatically determine the MPP of the corresponding panels. In an embodiment, the control blocks are implemented as DC-DC converters in conjunction with measurement and communication units.

Abstract translation: 在太阳能电池板阵列中，串联串联的每个太阳能电池板具有连接在其输出端子上的电流源。 电流源产生等于从面板吸取的负载电流与对应于面板最大功率点（MPP）的电流的差值的可编程输出电流。 结果，串中的每个面板在其MPP上操作。 当阵列包含并联连接的多个串时，电压源与每个串串连接。 电压源是可编程的，以产生相应的输出电压，以使其在MPP中的多个串中的每一个中能够操作每个面板。 提供电流源和电压源的各个控制块自动确定相应面板的MPP。 在一个实施例中，控制块与测量和通信单元一起被实现为DC-DC转换器。

公开(公告)号：US08106706B2

公开(公告)日：2012-01-31

申请号：US12463390

申请日：2009-05-09

Applicant: Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

Inventor： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

IPC: G05F1/10 ,  G05F3/02

CPC classification number: G05F3/26 ,  H03F1/301

Abstract: A method for biasing a MOS transistor includes AC coupling an input signal from an amplifier stage to a gate of the MOS transistor. The method includes connecting a pair of diodes in an opposing parallel configuration to a bias transistor and a current source. Further, the method includes generating a DC bias voltage through the bias transistor and the current source. The method also includes clamping the voltage at drain of the bias transistor to a fixed voltage by a clamping circuit. Further, the method includes coupling the DC bias voltage to the gate of the MOS transistor through the pair of diodes.

Abstract translation: 用于偏置MOS晶体管的方法包括将来自放大器级的输入信号AC耦合到MOS晶体管的栅极。 该方法包括将一对相反并联配置的二极管连接到偏置晶体管和电流源。 此外，该方法包括通过偏置晶体管和电流源产生DC偏置电压。 该方法还包括通过钳位电路将偏置晶体管的漏极处的电压钳位到固定电压。 此外，该方法包括通过一对二极管将DC偏置电压耦合到MOS晶体管的栅极。