公开(公告)号：US20230163042A1

公开(公告)日：2023-05-25

申请号：US17858124

申请日：2022-07-06

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Sheng-Yao Wu ,  Min-Shun Lo ,  Shih-Chieh Lin ,  Yong-Zhong Hu

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/373

CPC classification number: H01L23/3675 ,  H01L25/0655 ,  H01L24/16 ,  H01L24/96 ,  H01L24/97 ,  H01L21/568 ,  H01L21/561 ,  H01L24/11 ,  H01L21/4882 ,  H01L23/3121 ,  H01L23/3735 ,  H01L2924/30101 ,  H01L2924/30107 ,  H01L2224/95001 ,  H01L24/13 ,  H01L2224/13147 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13116 ,  H01L2224/11462 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/16235 ,  H01L2924/182

Abstract: A package structure includes: a heat dissipation substrate; at least one die, including a signal transmitting side and a heat conduction side, wherein the signal transmitting side and the heat conduction side are two opposite sides on the die, and the heat conduction side is disposed on and in contact with the heat dissipation substrate; plural metal bumps, disposed on the signal transmitting side; and a package material, encapsulating the die, a side of the heat dissipation substrate in contact with the die, and the metal bumps, wherein a portion of each metal bump is exposed to an outside of the package material.

公开(公告)号：US11646364B2

公开(公告)日：2023-05-09

申请号：US17187540

申请日：2021-02-26

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chih-Feng Huang ,  Lung-Sheng Lin

IPC: H01L29/739 ,  H01L29/66 ,  H01L27/07 ,  H01L27/02

CPC classification number: H01L29/7393 ,  H01L27/0248 ,  H01L27/0783 ,  H01L29/66325

Abstract: A power device which is formed on a semiconductor substrate includes: a lateral insulated gate bipolar transistor (LIGBT), a PN diode and a clamp diode. The PN diode is connected in parallel to the LIGBT. The clamp diode has a clamp forward terminal and a clamp reverse terminal, which are electrically connected to a drain and a gate of the LIGBT, to clamp a gate voltage applied to the gate not to be higher than a predetermined voltage threshold.

公开(公告)号：US20230131821A1

公开(公告)日：2023-04-27

申请号：US17858117

申请日：2022-07-06

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Sheng-Yao Wu ,  Chi-Yung Wu ,  Yong-Zhong Hu

IPC: H01L23/495

Abstract: A heat dissipation structure, includes: a lead frame, including a high temperature pad and a low temperature pad, the high temperature pad and the low temperature pad being two portions in the lead frame which are separated from each other, wherein a high heat generation component is disposed on the high temperature pad; and a high thermal conduction element, including two sides which are respectively directly connected with the high temperature pad and the low temperature pad, to dissipate the heat energy from the high heat generation component to the low temperature pad.

公开(公告)号：US20230072042A1

公开(公告)日：2023-03-09

申请号：US17683462

申请日：2022-03-01

Applicant: Richtek Technology Corporation

Inventor： Chia-Tseng CHIANG ,  Hao-Yu LI

IPC: G05F3/26

Abstract: An electronic circuit includes a first transistor coupled between a first node and a supply voltage and controlled by a first node, a second transistor coupled between a second node and the supply voltage and controlled by the first node, a third transistor coupled between a third node and the supply voltage and controlled by a fourth node, a fourth transistor coupled between the fourth node and the supply voltage and controlled by the fourth node, a fifth transistor coupled between the first node and the fifth node and controlled by a reference voltage, a sixth transistor coupled between the second node and a ground and controlled by the third node, a seventh transistor coupled between the fourth node and the ground and controlled by the second node, a first resistor coupled the fourth node to the ground, and a second resistor coupled to the fifth node.

公开(公告)号：US11601078B2

公开(公告)日：2023-03-07

申请号：US17488119

申请日：2021-09-28

Applicant: Richtek Technology Corporation

Inventor： I-Chi Lin ,  Chang-Yi Lin ,  Ming-Cheng Chen

IPC: H02P6/14 ,  H02P6/182 ,  H02M7/5387 ,  H02P6/20 ,  H02M1/088

Abstract: A BLDC motor driver circuit includes: a driving power stage circuit configured to provide a start-up test signal in a start-up mode to excite a BLDC motor, to drive a rotor of the BLDC motor to rotate for a test; a current unidirectional circuit coupled to the BLDC motor at a reverse end for detecting a BEMF, to generate a detection signal at a forward end of the current unidirectional circuit, wherein when a voltage at the reverse end exceeds a voltage at the forward end, the current unidirectional circuit limits the voltage at the forward end not to be higher than a clamp voltage; a biasing circuit for biasing the current unidirectional circuit in a forward operation state and for providing the clamp voltage; and a sensor circuit for generating a sensing signal according to the detection signal to indicate a test rotation state of the BLDC motor.

公开(公告)号：US11581797B2

公开(公告)日：2023-02-14

申请号：US17680245

申请日：2022-02-24

Applicant: Richtek Technology Corporation

Inventor： Wei-Hsu Chang ,  Shih-Jen Yang ,  Yi-Wei Lee ,  Ta-Yung Yang

IPC: H02M1/00 ,  H02M3/155 ,  H02M3/335

Abstract: A multiple output universal serial bus travel adaptor includes: at least one AC-DC converter for converting an AC power to a first DC power; at least one DC-DC converter for providing a second DC power according to the first DC power; plural switches which are coupled to the AC-DC converter and/or the DC-DC converter to provide the first DC power or the second DC power to corresponding connectors according to operation signals; and a protocol controller configured to generate the operation signals according to at least one of the following parameters: a) the types of the connectors; b) whether there is a mobile device connected with the connectors; c) a first command from the mobile device; d) the power consumed by the mobile devices; e) the currents flowing through the connectors; and f) the voltages at the connectors.

公开(公告)号：US11552547B2

公开(公告)日：2023-01-10

申请号：US17325778

申请日：2021-05-20

Applicant: Richtek Technology Corporation

Inventor： Kuo-Chi Liu ,  Ta-Yung Yang ,  Chung-Lung Pai

IPC: H02M1/00 ,  H02M3/335

Abstract: A resonant switching power converter includes: at least one capacitor; switches coupled to the at least one capacitor; at least one charging inductor; at least one discharging inductor; and a zero current estimation circuit. The switches switch electrical connection relationships of capacitors according to an operation signal. The zero current estimation circuit estimates a time point at which a charging resonant current is zero during a charging process and/or estimate a time point at which a discharging resonant current is zero during at least one discharging process according to voltage differences across two ends of the charging inductor and/or the discharging inductor, so as to correspondingly generate a zero current estimation signal. The zero current estimation signal is adopted to generate the operation signal.

公开(公告)号：US11545908B2

公开(公告)日：2023-01-03

申请号：US17245043

申请日：2021-04-30

Applicant: Richtek Technology Corporation

Inventor： Wei-Hsu Chang ,  Kun-Yu Lin ,  Tzu-Chen Lin ,  Ta-Yung Yang

IPC: H02M3/335 ,  H02M1/00 ,  H04B10/80 ,  H03K17/78

Abstract: A flyback power converter circuit includes a transformer, a blocking switch, a primary side switch, a primary side controller circuit and a secondary side controller circuit. The transformer is coupled between an input voltage and an internal output voltage in an isolated manner. The blocking switch controls the electric connection between the internal output voltage and an external output voltage. In a standby mode, the internal output voltage is regulated to a standby voltage, and the blocking switch is controlled to be OFF; in an operation mode, the internal output voltage is regulated to an operating voltage, and the blocking switch is controlled to be ON, such that the external output voltage has the operating voltage. The standby voltage is smaller than the operating voltage, so that the power consumption of the flyback power converter circuit is reduced in the standby mode.

公开(公告)号：US20220416652A1

公开(公告)日：2022-12-29

申请号：US17851015

申请日：2022-06-27

Applicant: Richtek Technology Corporation

Inventor： Chen-Pin Huang ,  Chia-Chun Li ,  Chen-Lin Hsu ,  Hung-Yu Cheng ,  Wan-Hsuan Yang

IPC: H02M1/44 ,  H02M1/34 ,  H02M3/158

Abstract: A switching power converter includes: a power stage circuit, including at least one transistor which is configured to operably switch an inductor to convert an input power to an output power; and an active EMI filter circuit, including at least one amplifier, wherein the at least one amplifier is configured to operably sense a noise input signal which is related to a switching noise caused by the switching of the power stage circuit, and amplify the noise input signal to generate a noise canceling signal, wherein the noise canceling signal is injected into an input node of the switching power converter, so as to suppress the switching noise and thus reducing EMI, wherein the input power is provided through the input node to the power stage circuit.

公开(公告)号：US11522536B2

公开(公告)日：2022-12-06

申请号：US17568637

申请日：2022-01-04

Applicant: Richtek Technology Corporation

Inventor： Kun-Huang Yu ,  Chien-Yu Chen ,  Ting-Wei Liao ,  Wu-Te Weng ,  Chien-Wei Chiu ,  Yong-Zhong Hu ,  Ta-Yung Yang

IPC: H03K17/00 ,  H03K17/16 ,  H03K17/687

Abstract: A switch capable of decreasing parasitic inductance includes: a semiconductor device, a first top metal line, and a second top metal line. The second top metal line electrically connects a power supply input end and a current inflow end of the semiconductor device, wherein a first part of the first top metal line is arranged in parallel and adjacent to a second part of the second top metal line. When the semiconductor device is in an ON operation, an input current outflows from the power supply input end, and is divided into a first current and a second current. When the first current and the second current flow through the first part and the second part respectively, the first current and the second current flow opposite to each other, to reduce an total parasitic inductance of the first top metal line and the second top metal line.