Silicon cap for annealing gallium arsenide
    22.
    发明授权
    Silicon cap for annealing gallium arsenide 失效
    用于退火砷化镓的硅帽

    公开(公告)号:US4615766A

    公开(公告)日:1986-10-07

    申请号:US705959

    申请日:1985-02-27

    摘要: A method of manufacturing GaAs semiconductor devices includes the steps of emplacing doping impurities by ion implantation on at least one surface of a GaAs substrate, and a step of annealing to remove damage resulting from the implantation of the impurities in the GaAs material. Prior to the annealing, a silicon capping layer is deposited on the surface by either sputtering, evaporation, or vapor deposition to a thickness of 100-10,000 angstroms. Subsequent to the annealing, the silicon capping layer is removed by etching. The silicon cap prevents out-diffusion of arsenic from the GaAs, and has a coefficient of thermal expansion which is sufficiently close to that of the GaAs to inhibit the formation of cracks in the capping layer.

    摘要翻译: 一种制造GaAs半导体器件的方法包括以下步骤:通过离子注入在GaAs衬底的至少一个表面上放置掺杂杂质;以及退火步骤,以消除在GaAs材料中注入杂质所引起的损伤。 在退火之前,通过溅射,蒸发或气相沉积将表面上的硅覆盖层沉积到100-10,000埃的厚度。 在退火之后,通过蚀刻去除硅覆盖层。 硅帽防止砷从GaAs的扩散扩散,并且具有足够接近于GaAs的热膨胀系数以抑制覆盖层中的裂纹的形成。

    Semiconductor conversion of optical-to-electrical energy
    23.
    发明授权
    Semiconductor conversion of optical-to-electrical energy 失效
    光电能的半导体转换

    公开(公告)号:US4525731A

    公开(公告)日:1985-06-25

    申请号:US454784

    申请日:1982-12-30

    摘要: Optical-to-electrical conversion is accomplished using an undoped region bounded by a tunneling junction of the order of the mean free path of an electron. A number of regions are assembled in series with larger thickness away from the light incident surface. The thickness and doping of the regions for maximum effectiveness in monochromatic light are tailored to produce similar quantities of carriers from the light. A nine section GaAs structure with 50 .ANG. n.sup.+ and p.sup.+ tunneling bounding regions has a 90% quantum efficiency and delivers a 5 volt output with a 0.35 picosecond transit time.

    摘要翻译: 使用由电子平均自由程的阶数的隧道结界定的未掺杂区域实现光电转换。 许多区域与光入射表面相比较大地组合成较大的厚度。 针对在单色光中最大效能的区域的厚度和掺杂被定制以从光产生相似量的载流子。 具有50个ANGSTROM n +和p +隧道界限区域的九段GaAs结构具有90%的量子效率,并以0.35皮秒的传输时间提供5伏输出。

    Frequency-agile beam scanning reconfigurable antenna
    25.
    发明授权
    Frequency-agile beam scanning reconfigurable antenna 有权
    频率敏捷光束扫描可重构天线

    公开(公告)号:US07190317B2

    公开(公告)日:2007-03-13

    申请号:US11125432

    申请日:2005-05-10

    IPC分类号: H01Q7/00 H01Q9/00

    CPC分类号: H01Q3/26 H01Q7/00

    摘要: An antenna comprises an arrangement of electrically conducting segments, the arrangement including intersection points where two or more electrically conducting segments are in electrical communication. Example antennas include a plurality of capacitors located within some or all of the electrically conducting segments. Capacitance values can be determined using an optimization algorithm to obtain desired values of antenna resonance frequency (or frequencies), bandwidth, and/or radiation pattern, and may be adjusted in order to control an antenna parameter such as beam steering direction.

    摘要翻译: 天线包括导电段的布置,该布置包括两个或多个导电段电连通的交点。 示例性天线包括位于部分或全部导电段内的多个电容器。 可以使用优化算法来确定电容值,以获得天线谐振频率(或频率),带宽和/或辐射图案的期望值,并且可以调整以控制诸如波束转向方向的天线参数。

    Semiconductor heterostructure adapted for low temperature operation
    27.
    发明授权
    Semiconductor heterostructure adapted for low temperature operation 失效
    适用于低温运行的半导体异质结构

    公开(公告)号:US4860067A

    公开(公告)日:1989-08-22

    申请号:US137033

    申请日:1987-12-23

    摘要: A low band gap semiconductor heterostructure having a surface adaptable to planar processing and all semiconductor properties supported by a fabrication constraint relaxing substrate that does not provide a low impedance parallel current path. A superconductor normal superconductor device of n-InAs-100 nanometers thick with niobium superconductor electrodes spaced 250 nanometers apart and a 100 nanometer gate in the space. The N-InAs is supported by an undoped GaAs layer on a semi-insulating GaAs substrate. A heterojunction field effect transistor device having a GaAlAs gate over a channel 100 nanometers thick on an undoped GaAs layer on a semi-insulating GaAs substrate.

    摘要翻译: 具有适于平面处理的表面的低带隙半导体异质结构和由不提供低阻抗并联电流路径的制造约束放松衬底支持的所有半导体特性。 具有间隔250纳米的铌超导体电极的n-InAs-100纳米厚的超导体正常超导体器件和空间中的100纳米栅极。 N-InAs由半绝缘GaAs衬底上的未掺杂的GaAs层支撑。 一种异质结场效应晶体管器件,其在半绝缘GaAs衬底上的未掺杂的GaAs层上在100纳米厚的沟道上具有GaAlAs栅极。

    Thermally stable low resistance contact
    28.
    发明授权
    Thermally stable low resistance contact 失效
    耐热稳定的低电阻接触

    公开(公告)号:US4849802A

    公开(公告)日:1989-07-18

    申请号:US233851

    申请日:1988-08-16

    IPC分类号: H01L29/45

    CPC分类号: H01L29/452

    摘要: In a semiconductor device, a contact with low resistance to a III-V compound semiconductor substrate was fabricated using refractory materials and small amounts of indium as the contact material. The contact material was formed by depositing Mo, Ge and W with small amounts of In onto doped GaAs wafers. The contact resistance less than 1.0 ohm millimeter was obtained after annealing at 800.degree. C. and the resistance did not increase after subsequent prolonged annealing at 400.degree. C.

    摘要翻译: 在半导体器件中,使用耐火材料和少量的铟作为接触材料制造具有低耐III-V化合物半导体衬底的接触。 通过将Mo,Ge和W与少量的In沉积到掺杂的GaAs晶片上形成接触材料。 800℃退火后获得小于1.0欧姆毫米的接触电阻,在400℃下经过长时间的退火后,电阻不增加。

    Semiconductor injection lasers
    29.
    发明授权
    Semiconductor injection lasers 失效
    半导体注入激光器

    公开(公告)号:US4751708A

    公开(公告)日:1988-06-14

    申请号:US363193

    申请日:1982-03-29

    CPC分类号: H01S5/0281 H01L33/00

    摘要: Degradation of the cleaved light output surface of a semiconductor crystal injection laser is reduced through control of surface recombination by providing an annealed optically transparent coating at least one ingredient of which has a higher bandgap than said crystal over the cleaved light output surface. Crystals of GaAs, GaAlAs and GaInAsP are provided with annealed coatings of ZnS, CdS, CdTe and CdSe.

    摘要翻译: 通过提供退火的光学透明涂层,通过控制表面复合来降低半导体晶体注入激光器的切割光输出表面的降解,其中至少一种成分在切割的光输出表面上具有比所述晶体更高的带隙。 提供GaAs,GaAlAs和GaInAsP的晶体,其具有ZnS,CdS,CdTe和CdSe的退火涂层。

    Vertical MESFET with mesa step defining gate length
    30.
    发明授权
    Vertical MESFET with mesa step defining gate length 失效
    垂直MESFET与台阶步骤定义栅极长度

    公开(公告)号:US4587540A

    公开(公告)日:1986-05-06

    申请号:US705287

    申请日:1985-01-17

    申请人: Thomas N. Jackson

    发明人: Thomas N. Jackson

    摘要: The edge of a conformal coating over a mesa is usable to define a shoulder in the vertical dimension of the mesa which in turn is used for positioning. Structures are provided that permit electrodes at precise locations along the length of a mesa. A vertical field effect transistor is set forth with a mesa serving as the channel and the gate electrode positioned at a shoulder formed by the edge dimension of a coating on the sides of the mesa.

    摘要翻译: 在台面上的保形涂层的边缘可用于限定台面的垂直尺寸中的肩部,其又用于定位。 提供了允许沿着台面长度的精确位置处的电极的结构。 设置有作为沟道的台面的平面场效应晶体管,位于由台面的侧面上的涂层的边缘尺寸形成的肩部的栅电极。