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21.发明授权公开(公告)号：US10996565B2
公开(公告)日：2021-05-04
申请号：US16483452
申请日：2018-02-13
Applicant: ASML NETHERLANDS B.V.
Inventor： Peng Liu , Ya Luo , Yu Cao , Yen-Wen Lu
IPC: G03F7/20 , G06F30/392 , G06N3/08 , G06F30/39
Abstract: A method including: obtaining a characteristic of a portion of a design layout; determining a characteristic of M3D of a patterning device including or forming the portion; and training, by a computer, a neural network using training data including a sample whose feature vector includes the characteristic of the portion and whose supervisory signal includes the characteristic of the M3D. Also disclosed is a method including: obtaining a characteristic of a portion of a design layout; obtaining a characteristic of a lithographic process that uses a patterning device including or forming the portion; determining a characteristic of a result of the lithographic process; training, by a computer, a neural network using training data including a sample whose feature vector includes the characteristic of the portion and the characteristic of the lithographic process, and whose supervisory signal includes the characteristic of the result.
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公开(公告)号：US10948831B2
公开(公告)日：2021-03-16
申请号：US16484186
申请日：2018-02-20
Applicant: ASML NETHERLANDS B.V.
Inventor： Ya Luo , Yu Cao , Jen-Shiang Wang , Yen-Wen Lu
Abstract: Methods of determining, and using, a patterning process model that is a machine learning model. The process model is trained partially based on simulation or based on a non-machine learning model. The training data may include inputs obtained from a design layout, patterning process measurements, and image measurements.
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公开(公告)号：US20180268093A1
公开(公告)日：2018-09-20
申请号：US15982933
申请日：2018-05-17
Applicant: ASML Netherlands B.V.
Inventor： Guangqing CHEN , Shufeng Bai , Eric Richard Kent , Yen-Wen Lu , Paul Anthony Tuffy , Jen-Shiang Wang , Youping Zhang , Gertjan Zwartjes , Jan Wouter Bijlsma
CPC classification number: G06F17/5009 , G03F7/705 , G03F7/70633 , G03F7/70683 , G06F17/12 , G06F17/14 , G06F2217/12 , G06F2217/14
Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.
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公开(公告)号：US09903823B2
公开(公告)日：2018-02-27
申请号：US14945257
申请日：2015-11-18
Applicant: ASML NETHERLANDS B.V.
Inventor： Yen-Wen Lu , Jay Jianhui Chen , Wei Liu , Boris Menchtchikov , Jen-Shiang Wang , Te-Chih Huang
CPC classification number: G01N21/8806 , G01B11/272 , G01N21/9501 , G01N2021/8822 , G03F7/70516 , G03F7/70633 , G03F7/70683
Abstract: A method to determine an overlay error between a first structure and a second structure, wherein the first structure and second structures are on different layers on a substrate and are imaged onto the substrate by a lithographic process, the method comprising: obtaining an apparent overlay error; obtaining a systematic error caused by a factor other than misalignment of the first and second structures; and determining the overlay error by removing the systematic error from the apparent overlay error. The method may alternatively comprise obtaining apparent characteristics of diffraction orders of diffraction by an overlapping portion of the first and second structures; obtaining corrected characteristics of the diffraction orders; determining the overlay error from the corrected characteristics; and adjusting a characteristic of the lithographic process based on the overlay error.
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公开(公告)号：US09619607B2
公开(公告)日：2017-04-11
申请号：US14462187
申请日：2014-08-18
Applicant: ASML NETHERLANDS B.V.
Inventor： Jun Tao , Been-Der Chen , Yen-Wen Lu , Jiangwei Li , Min-Chun Tsai , Dong Mao
CPC classification number: G06F17/5081 , G03F1/70 , G03F7/70441
Abstract: Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features.
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Patent Agency Ranking
公开(公告)号：US09418194B2
公开(公告)日：2016-08-16
申请号：US14456462
申请日：2014-08-11
Applicant: ASML NETHERLANDS B.V.
Inventor： Taihui Liu , Been-Der Chen , Yen-Wen Lu
CPC classification number: G06F17/5081 , G03F1/70 , G06F17/50
Abstract: Described herein is a method of processing a pattern layout for a lithographic process, the method comprising: identifying a feature from a plurality of features of the layout, the feature violating a pattern layout requirement; and reconfiguring the feature, wherein the reconfigured feature still violates the pattern layout requirement, the reconfiguring including evaluating a cost function that measures a lithographic metric affected by a change to the feature and a parameter characteristic of relaxation of the pattern layout requirement.
Abstract translation: 这里描述了一种处理光刻处理的图案布局的方法，该方法包括：从布局的多个特征中识别特征，所述特征违反图案布局要求; 并且重新配置所述特征，其中所述重新配置的特征仍然违反所述图案布局要求，所述重新配置包括评估测量受所述特征的改变影响的光刻度量的成本函数以及所述图案布局要求的松弛的参数特征。
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公开(公告)号：US12204250B2
公开(公告)日：2025-01-21
申请号：US18233365
申请日：2023-08-14
Applicant: ASML NETHERLANDS B.V.
Inventor： Jing Su , Yen-Wen Lu , Ya Luo
Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.
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公开(公告)号：US20230137097A1
公开(公告)日：2023-05-04
申请号：US18089007
申请日：2022-12-27
Applicant: ASML NETHERLANDS B.V.
Inventor： Jing Su , Yen-Wen Lu , Ya Luo
Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.
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公开(公告)号：US20220277116A1
公开(公告)日：2022-09-01
申请号：US17744091
申请日：2022-05-13
Applicant: ASML NETHERLANDS B.V.
Inventor： Jing SU , Yi Zou , Chenxi Lin , Stefan Hunsche , Marinus Jochemsen , Yen-Wen Lu , Lin Lee Cheong
Abstract: Methods of identifying a hot spot from a design layout or of predicting whether a pattern in a design layout is defective, using a machine learning model. An example method disclosed herein includes obtaining sets of one or more characteristics of performance of hot spots, respectively, under a plurality of process conditions, respectively, in a device manufacturing process; determining, for each of the process conditions, for each of the hot spots, based on the one or more characteristics under that process condition, whether that hot spot is defective; obtaining a characteristic of each of the process conditions; obtaining a characteristic of each of the hot spots; and training a machine learning model using a training set including the characteristic of one of the process conditions, the characteristic of one of the hot spots, and whether that hot spot is defective under that process condition.
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公开(公告)号：US20200372201A1
公开(公告)日：2020-11-26
申请号：US16993685
申请日：2020-08-14
Applicant: ASML NETHERLANDS B.V.
Inventor： Frank Gang CHEN , Joseph Werner De Vocht , Yuelin Du , Wanyu Li , Yen-Wen Lu
IPC: G06F30/398 , G03F7/20
Abstract: A method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method including: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.
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