利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

112 条记录 (耗时 0.027 秒)

    Semiconductor device and method of manufacturing same
    21.
    发明授权
    Semiconductor device and method of manufacturing same 失效
    半导体装置及其制造方法

    公开(公告)号：US5710442A

    公开(公告)日：1998-01-20

    申请号：US589637

    申请日：1996-01-22

    申请人： Atsuo Watanabe ,  Katsuaki Saito

    发明人： Atsuo Watanabe ,  Katsuaki Saito

    IPC分类号： H01L21/332 ,  H01L29/06 ,  H01L29/10 ,  H01L29/74 ,  H01W29/74 ,  H01L31/111

    CPC分类号： H01L29/74 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/102 ,  H01L29/0834

    摘要： A semiconductor device sets an impurity density of a p base layer in a bevel end-face region to a density lower than that in an operating region and has a parasitic channel preventive region provided between the bevel end-face region and the operating region. Since the blocking-voltage and the current-carrying capacity can be adjusted independently from each other, the blocking voltage and the current-carrying capacity can be both improved.

    摘要翻译： 半导体器件将斜面端面区域中的p基层的杂质浓度设定为低于工作区域的密度，并且具有设置在斜面端面区域与工作区域之间的寄生沟道防止区域。 由于阻断电压和载流能力可以彼此独立地调节，因此可以改善阻断电压和载流能力。

    Method of fabricating a semiconductor device having silicide layers for electrodes
    22.
    发明授权
    Method of fabricating a semiconductor device having silicide layers for electrodes 失效
    制造具有用于电极的硅化物层的半导体器件的方法

    公开(公告)号：US5607866A

    公开(公告)日：1997-03-04

    申请号：US458112

    申请日：1995-06-02

    申请人： Kazushige Sato ,  Atsuo Watanabe ,  Kenichi Kikushima ,  Nobuo Owada ,  Masaya Iida

    发明人： Kazushige Sato ,  Atsuo Watanabe ,  Kenichi Kikushima ,  Nobuo Owada ,  Masaya Iida

    IPC分类号： H01L21/285 ,  H01L21/8249 ,  H01L27/06 ,  H01L21/265

    CPC分类号： H01L21/8249 ,  H01L21/28518 ,  H01L27/0635 ,  Y10S148/009

    摘要： In a method of fabricating a semiconductor device having a MISFET and/or bipolar transistor and/or a resistor formed with different surface portions of a single silicon semiconductor substrate in which a silicide layer is formed on each of source/drain regions of the MISFET and/or collector contact region and extrinsic base region of the bipolar transistor and/or contact regions of the resistor, the bipolar transistor has its emitter region formed by diffusing an impurity contained in doped polysilicon film serving as an emitter electrode of the bipolar transistor into a part of its base region. The resistor may have a resistive region formed in a surface portion of the substrate and may be covered with an insulating film and a doped polysilicon film thereon or may have a doped polysilicon film formed over a surface portion of the substrate as a resistor element. These doped polysilicon films in the resistor are films which are formed in the same step as that for the doped silicon film serving as the emitter electrode in the bipolar transistor. Each of the doped polysilicon film in the bipolar transistor and that in the resistor are covered with an insulating film before a refractory metal film is formed over a whole surface of the substrate to prevent formation of silicide films on the doped polysilicon films in the bipolar transistor and resistor.

    摘要翻译： 在制造具有MISFET和/或双极晶体管和/或形成有单晶硅半导体衬底的不同表面部分的电阻器的半导体器件的方法中，其中在MISFET的每个源极/漏极区域上形成硅化物层， /或集电极接触区域和双极性晶体管的非本征基极区域和/或电阻器的接触区域，双极晶体管的发射极区域通过将掺杂多晶硅膜中所含的杂质扩散到双极型晶体管的发射电极而形成， 其基地区的一部分。 电阻器可以具有形成在衬底的表面部分中的电阻区域，并且可以在其上覆盖绝缘膜和掺杂多晶硅膜，或者可以在衬底的表面部分上形成作为电阻器元件的掺杂多晶硅膜。 电阻器中的这些掺杂多晶硅膜是与双极晶体管中的发射极电极的掺杂硅膜相同的步骤形成的膜。 在双极晶体管的整个表面上形成耐火金属膜之前，双极晶体管中的每个掺杂多晶硅膜和电阻器中的掺杂多晶硅膜都被绝缘膜覆盖，以防止在双极晶体管中的掺杂多晶硅膜上形成硅化物膜 和电阻。

    Concentration of solution by reverse osmosis
    24.
    发明授权
    Concentration of solution by reverse osmosis 失效
    通过反向麻醉的浓度浓度

    公开(公告)号：US4990257A

    公开(公告)日：1991-02-05

    申请号：US538540

    申请日：1990-06-14

    申请人： Atsuo Watanabe ,  Mitsutoshi Nakajima ,  Hiroshi Nabetani ,  Yasunori Yamada ,  Tsutomu Ohmori

    发明人： Atsuo Watanabe ,  Mitsutoshi Nakajima ,  Hiroshi Nabetani ,  Yasunori Yamada ,  Tsutomu Ohmori

    IPC分类号： B01D61/08 ,  A23L2/08 ,  B01D61/02 ,  B01D61/58

    CPC分类号： A23L2/085 ,  B01D61/022

    摘要： Provided is a multistage method and apparatus for concentrating a solution by reverse osmosis, comprising the steps and means for: maximizing the concentration of absolute in a solution in a multistage apparatus having only standard capacity pumps, including steps of providing first concentrating means for concentrating a solution to a first concentration, said first concentrating means comprising a least one concentrating unit which positioned upstream with respect to a direction in which a solution to be concentrated flows, and providing second concentrating means for concentrating the solution that has been concentrated by first concentrating means to a second concentration which is higher than said first concentrating means comprising at least one concentrating unit which is positioned downstream with respect to said direction; said concentrating units comprising consisting essentially of respective membrane modules and respective standard capacity pumps, the membrane module of the concentrating unit of said first concentrating means comprising a tight reverse osmosis membrane with a high rejection percentage sufficient to achieve a high concentration of said solution with a high flux density of solvent flowing through the membrane, and the membrane module of the concentrating unit of said second concentrating means comprising a loose reverse osmosis membrane with a lower rejection percentage sufficient to easily achieve a further concentration of said first concentrating means with a high flux density of solution flowing through the membrane.

    Dielectric material separated-type, high breakdown voltage semiconductor circuit device, and production method thereof
    26.
    发明授权
    Dielectric material separated-type, high breakdown voltage semiconductor circuit device, and production method thereof 有权
    电介质材料分离型，高击穿电压半导体电路器件及其制造方法

    公开(公告)号：US07982266B2

    公开(公告)日：2011-07-19

    申请号：US11684032

    申请日：2007-03-09

    申请人： Atsuo Watanabe ,  Mitsutoshi Honda ,  Norio Ishitsuka ,  Masahiro Ito ,  Toshihito Tabata ,  Shinichi Kurita ,  Hidekazu Kamioka

    发明人： Atsuo Watanabe ,  Mitsutoshi Honda ,  Norio Ishitsuka ,  Masahiro Ito ,  Toshihito Tabata ,  Shinichi Kurita ,  Hidekazu Kamioka

    IPC分类号： H01L27/12

    CPC分类号： H01L21/76286 ,  H01L29/7394 ,  H01L29/7824

    摘要： A dielectrically isolated semiconductor device of high reliability is provided by realizing a fine and deep element isolating region which can prevent dislocation of an oxide film as an insulation layer by oxidation-induced stress. The dielectrically isolated semiconductor device includes an SOI substrate supporting an active element layer deeper than an expanded distance of a depletion layer subjected to the highest voltage applied to the device, and an element isolating region which encloses the active element layer. The element isolating region contains a deep trench which comes into contact with the insulation layer, and which is filled with n heavily doped layers on both side walls, second insulation films each adjacent to the n heavily doped layer and a polycrystalline semiconductor layer formed between the second insulation films.

    摘要翻译： 通过实现能够防止作为绝缘层的氧化膜由于氧化诱发应力而脱位的细微深元件隔离区域，提供高可靠性的介电隔离半导体器件。 介电隔离的半导体器件包括支撑有源元件层的SOI衬底，该有源元件层比经受施加到器件的最高电压的耗尽层的扩展距离更深，以及包围有源元件层的元件隔离区域。 元件隔离区域包含与绝缘层接触的深沟槽，并且在两个侧壁上填充有n个重掺杂层，每个与n重掺杂层相邻的第二绝缘膜和形成在第二绝缘层之间的多晶半导体层 第二绝缘膜。

    AUDIO SIGNAL REPRODUCTION DEVICE AND AUDIO SIGNAL REPRODUCTION SYSTEM
    27.
    发明申请
    AUDIO SIGNAL REPRODUCTION DEVICE AND AUDIO SIGNAL REPRODUCTION SYSTEM 有权
    音频信号再现设备和音频信号再现系统

    公开(公告)号：US20100183157A1

    公开(公告)日：2010-07-22

    申请号：US12664557

    申请日：2008-05-23

    申请人： Atsuo Watanabe

    发明人： Atsuo Watanabe

    IPC分类号： H04R5/00

    CPC分类号： H04S3/002 ,  H04R2400/03

    摘要： In an audio signal reproduction device and an audio signal reproduction system of the present invention, an SLch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5a, 5d located at Lch and SBLch speaker positions, and an SRch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5b, 5e located at Rch and SBRch speaker positions. This configuration can achieve 5.1 ch virtual reproduction with high sound quality in which sounds for 5.1 channels of LPCM 7.1 ch audio information included in the contents are output as they are and sounds for the remaining 2 channels are reproduced artificially even if speakers compatible with the 5.1 ch sound field system are connected.

    摘要翻译： 在本发明的音频信号再现装置和音频信号再现系统中，SLch声音被再现为由位于Lch和SBLch扬声器位置的两个扬声器5a，5d适当地调节的混合声音，并且再现SRch声音 作为由位于Rch和SBRch扬声器位置的两个扬声器5b，5e适当调节的混合声音。 该配置可以实现5.1声道高音质虚拟再现，其中包含在内容中的5.1声道LPCM 7.1声道信息的声音原样输出，其余2声道的声音即使人声兼容，即使扬声器与5.1 ch声场系统连接。

    Silicon carbide semiconductor device and method for manufacturing the same
    29.
    发明授权
    Silicon carbide semiconductor device and method for manufacturing the same 有权
    碳化硅半导体器件及其制造方法

    公开(公告)号：US07355207B2

    公开(公告)日：2008-04-08

    申请号：US11135661

    申请日：2005-05-24

    申请人： Rajesh Kumar ,  Tsuyoshi Yamamoto ,  Hiroki Nakamura ,  Toshiyuki Morishita ,  Takasumi Ohyanagi ,  Atsuo Watanabe

    发明人： Rajesh Kumar ,  Tsuyoshi Yamamoto ,  Hiroki Nakamura ,  Toshiyuki Morishita ,  Takasumi Ohyanagi ,  Atsuo Watanabe

    IPC分类号： H01L29/15 ,  H01L31/0312

    CPC分类号： H01L29/1608 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/66068 ,  H01L29/8083

    摘要： A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

    摘要翻译： 碳化硅半导体器件的制造方法包括以下步骤：制备包括碳化硅衬底，漂移层和第一半导体层的半导体衬底; 在单元部分中形成多个第一沟槽; 通过外延生长法在每个第一沟槽的内壁上形成栅极层; 在所述半导体衬底的表面上形成第一绝缘膜; 在所述第一绝缘膜上形成用于电连接到所述栅极层的栅电极; 在所述第一绝缘膜上形成用于连接到所述单元部分中的所述第一半导体层的源电极; 以及电连接到所述碳化硅衬底的漏电极。