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公开(公告)号：US20090072241A1
公开(公告)日：2009-03-19
申请号：US11855595
申请日：2007-09-14
IPC分类号： H01L29/24
CPC分类号： H01L29/7827 , H01L29/0623 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/41741 , H01L29/41766 , H01L29/4238 , H01L29/45 , H01L29/66068 , H01L29/66727 , H01L29/66734 , H01L29/7813
摘要： A trench metal oxide semiconductor field effect transistor or UMOSFET, includes a buried region that extends beneath the trench and beyond a corner of the trench. The buried region is tied to a source potential of the UMOSFET, and splits the potential realized across the structure. This effectively shields the electric field from the corners of the trench to reduce gate oxide stress, and resultantly improves device performance and reliability.
摘要翻译： 沟槽金属氧化物半导体场效应晶体管或UMOSFET包括在沟槽下方延伸并超出沟槽的角的掩埋区域。 掩埋区域与UMOSFET的源极电位相关联，并分解了跨结构实现的潜力。 这有效地屏蔽来自沟槽角的电场，以减少栅极氧化物应力，从而提高器件的性能和可靠性。
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公开(公告)号：US07355223B2
公开(公告)日：2008-04-08
申请号：US11071437
申请日：2005-03-04
IPC分类号： H01L29/80 , H01L31/112
CPC分类号： H01L29/66909 , H01L29/1066 , H01L29/8083
摘要： A vertical junction field effect transistor includes a trench formed in an epitaxial layer. The trench surrounds a channel region of the epitaxial layer. The channel region may have a graded or uniform dopant concentration profile. An epitaxial gate structure is formed within the trench by epitaxial regrowth. The epitaxial gate structure may include separate first and second epitaxial gate layers, and may have either a graded or uniform dopant concentration profile.
摘要翻译： 垂直结场效应晶体管包括形成在外延层中的沟槽。 沟槽围绕外延层的沟道区。 沟道区可以具有渐变或均匀的掺杂浓度分布。 通过外延再生长在沟槽内形成外延栅极结构。 外延栅结构可以包括单独的第一和第二外延栅层，并且可以具有渐变的或均匀的掺杂剂浓度分布。
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公开(公告)号：US20060252212A1
公开(公告)日：2006-11-09
申请号：US10570852
申请日：2003-09-05
IPC分类号： H01L21/336
CPC分类号： H01L29/66924 , H01L29/66068 , H01L29/66462 , H01L29/66863
摘要： Method for producing a field effect transistor having a source region (9), a drain region and a channel layer (11) interconnecting the source and drain regions, and including the step of providing a sacrificial layer (4) on part of a semiconductor material (1) whose edge is used to define the edge of an implant, such as the source region (9), in the semiconductor material (1), where the edge (4c) of the sacrificial layer (4) is subsequently used to define the edge of a gate (16).
摘要翻译： 一种具有源极区域（9），漏极区域和互连源极区域的沟道层（11）的场效应晶体管的方法，包括在半导体材料的一部分上提供牺牲层（4）的步骤 （1），其边缘用于限定半导体材料（1）中的诸如源极区域（9）的植入物的边缘，其中牺牲层（4）的边缘（4c）随后用于 限定门（16）的边缘。
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公开(公告)号：US20060220072A1
公开(公告)日：2006-10-05
申请号：US11071437
申请日：2005-03-04
IPC分类号： H01L29/80
CPC分类号： H01L29/66909 , H01L29/1066 , H01L29/8083
摘要： A vertical junction field effect transistor includes a trench formed in an epitaxial layer. The trench surrounds a channel region of the epitaxial layer. The channel region may have a graded or uniform dopant concentration profile. An epitaxial gate structure is formed within the trench by epitaxial regrowth. The epitaxial gate structure may include separate first and second epitaxial gate layers, and may have either a graded or uniform dopant concentration profile.
摘要翻译： 垂直结场效应晶体管包括形成在外延层中的沟槽。 沟槽围绕外延层的沟道区。 沟道区可以具有渐变或均匀的掺杂浓度分布。 通过外延再生长在沟槽内形成外延栅极结构。 外延栅结构可以包括单独的第一和第二外延栅层，并且可以具有渐变的或均匀的掺杂剂浓度分布。
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25.发明授权Field effect transistor of SiC for high temperature application, use of such a transistor and a method for production thereof 有权用于高温应用的SiC的场效应晶体管，使用这种晶体管及其制造方法公开(公告)号：US06278133B1
公开(公告)日：2001-08-21
申请号：US09298116
申请日：1999-04-23
IPC分类号： H01L310312
CPC分类号： H01L29/0847 , G01N27/4143 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/7828 , H01L29/7838
摘要： A field effect transistor of SiC for high temperature application has the source region layer (4), the drain region layer (5) and the channel region layer (6, 7) vertically separated from a front surface (14), where a gate electrode (12) is arranged, for reducing the electric field at said surface in operation of the transistor and in the case of operation as a gas sensor permitting all electrodes except for the gate electrode to be protected from the atmosphere.
摘要翻译： 用于高温施加的SiC的场效应晶体管具有源区域层（4），漏极区域层（5）和沟道区域层（6,7）与前表面（14）垂直分离，其中栅电极 （12）被布置为用于在晶体管的操作中减小所述表面处的电场，并且在作为气体传感器的操作的情况下，允许除了栅电极之外的所有电极被保护免受大气。
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26.发明授权Method for introduction of an impurity dopant in SiC, a semiconductor device formed by the method and a use of highly doped amorphous layer as a source for dopant diffusion into SiC 失效在SiC中引入杂质掺杂剂的方法，通过该方法形成的半导体器件和使用高掺杂非晶层作为掺杂剂扩散到SiC的源
公开(公告)号：US5851908A
公开(公告)日：1998-12-22
申请号：US436488
申请日：1995-05-08
IPC分类号： H01L21/22 , C23C14/48 , C30B31/22 , H01L21/04 , H01L21/265 , H01L29/861
CPC分类号： C23C14/48 , C30B31/22 , H01L21/046 , Y10S438/931
摘要： A method for introduction of an impurity dopant into a semiconductor layer of SiC comprises the step of ion implantation of the dopant in the semiconductor layer at a low temperature. The ion implantation is carried out in such a way that a doped and amorphous near-surface layer is formed, and the implantation step is followed by a step of annealing the semiconductor layer at such a high temperature that the dopant diffuses into the non-implanted sub-layer of the semiconductor layer following the near-surface layer.
摘要翻译： 将杂质掺杂剂引入到SiC的半导体层中的方法包括在低温下在半导体层中离子注入掺杂剂的步骤。 以这样的方式进行离子注入，即形成掺杂和无定形的近表面层，并且注入步骤之后是在掺杂剂扩散到非植入的高温下退火半导体层的步骤 在接近表面层之后的半导体层的子层。
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公开(公告)号：US5831292A
公开(公告)日：1998-11-03
申请号：US637304
申请日：1996-04-24
IPC分类号： H01L29/24 , H01L29/423 , H01L29/739 , H01L29/74 , H01L31/0312 , H01L31/111
CPC分类号： H01L29/7395 , H01L29/42376 , H01L29/1608
摘要： A transistor of SiC having an insulated gate comprises a drain contact with a highly doped substrate layer formed on the drain. The substrate layer is of p-type or of n-type. For a p-type transistor, a highly doped n-type buffer layer may optionally be formed on top of the substrate layer. A low doped n-type drift layer, a highly doped p-type base layer, a highly doped n-type source region, and a source contact are then superimposed on the substrate layer. A vertical trench extends through the source region and the base layer to at least the drift layer. The trench has a wall next to these layers. A gate electrode extends vertically along the wall and at least over a vertical extension of the base layer. An insulating layer is arranged between the gate electrode and at least the base layer whereby an inversion channel is formed for electron transport from the source contact to the drain contact. An additional low doped p-type layer is arranged in the channel region laterally to the base layer, between the base layer and the insulating layer. The additional layer extends vertically over at least the base layer.
摘要翻译： 具有绝缘栅极的SiC晶体管包括与形成在漏极上的高掺杂衬底层的漏极接触。 衬底层是p型或n型。 对于p型晶体管，高可掺杂的n型缓冲层可任选地形成在衬底层的顶部上。 然后将低掺杂n型漂移层，高掺杂的p型基极层，高掺杂的n型源极区和源极接触叠加在衬底层上。 垂直沟槽延伸穿过源极区域和基极层至少到漂移层。 沟槽在这些层旁边有一个墙壁。 栅电极沿着壁垂直延伸，并且至少在基层的垂直延伸部上延伸。 绝缘层设置在栅极电极和至少基极层之间，由此形成用于从源极接触到漏极接触的电子传输的反转沟道。 在沟道区域中，在基底层和绝缘层之间的基底层侧向布置有附加的低掺杂p型层。 附加层至少在基层上垂直延伸。
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公开(公告)号：USD713516S1
公开(公告)日：2014-09-16
申请号：US29438208
申请日：2012-11-27
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公开(公告)号：US08796809B2
公开(公告)日：2014-08-05
申请号：US12206209
申请日：2008-09-08
申请人： Christopher Harris
发明人： Christopher Harris
IPC分类号： H01L29/93 , H01L21/329 , H01L27/08 , H01L29/66 , H01L29/36 , H01L29/47 , H01L29/40 , H01L29/16 , H01L29/20 , H01L29/267
CPC分类号： H01L29/93 , H01L27/0808 , H01L27/0811 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/36 , H01L29/402 , H01L29/47 , H01L29/66174
摘要： A varactor diode includes a contact layer having a first conductivity type, a voltage blocking layer having the first conductivity and a first net doping concentration on the contact layer, a blocking junction on the voltage blocking layer, and a plurality of discrete doped regions in the voltage blocking layer and spaced apart from the carrier injection junction. The plurality of discrete doped regions have the first conductivity type and a second net doping concentration that is higher than the first net doping concentration, and the plurality of discrete doped regions are configured to modulate the capacitance of the varactor diode as a depletion region of the varactor diode expands in response to a reverse bias voltage applied to the blocking junction. Related methods of forming a varactor diode are also disclosed.
摘要翻译： 变容二极管包括具有第一导电类型的接触层，具有第一导电性的电压阻挡层和在接触层上的第一净掺杂浓度，电压阻挡层上的阻挡结，以及在该阻抗层中的多个离散掺杂区 电压阻挡层并与载流子注入结隔开。 所述多个离散掺杂区域具有高于第一净掺杂浓度的第一导电类型和第二净掺杂浓度，并且所述多个离散掺杂区域被配置为调制变容二极管的电容作为所述第一净掺杂浓度的耗尽区 变容二极管响应于施加到阻塞结的反向偏置电压而膨胀。 还公开了形成变容二极管的相关方法。
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公开(公告)号：US20120065880A1
公开(公告)日：2012-03-15
申请号：US13231793
申请日：2011-09-13
申请人： Christopher Harris
发明人： Christopher Harris
IPC分类号： G01C21/00
CPC分类号： G01C21/206 , G01S1/70
摘要： A vehicle tracking system tracks the position of at least one vehicle and displays the tracked position. The system includes a plurality of beacons, at least one provided on each vehicle, configured to emit a corresponding identifying signal. A camera is configured to generate image data including region data based on a region in which the vehicles may be located, and beacon data based on the identifying signals corresponding to the beacons located in the region. A controller is configured to process the beacon data to generate position data based on a corresponding position of the beacons located in the region and to generate identification data, which corresponds to each of the identifying signals emitted by the beacons located in the region. Also, the controller outputs at least one of the image data, the position data, and the identification data to the monitor.
摘要翻译： 车辆跟踪系统跟踪至少一辆车辆的位置并显示跟踪位置。 该系统包括多个信标，至少一个设置在每个车辆上的信标，被配置为发射相应的识别信号。 相机被配置为基于与位于该区域中的信标相对应的识别信号，生成基于车辆可能位于的区域的包括区域数据的图像数据和信标数据。 控制器被配置为处理信标数据以基于位于该区域中的信标的对应位置产生位置数据，并且生成对应于位于该区域中的信标发出的每个识别信号的识别数据。 此外，控制器将至少一个图像数据，位置数据和识别数据输出到监视器。
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