公开(公告)号：US20180166530A1

公开(公告)日：2018-06-14

申请号：US15372505

申请日：2016-12-08

申请人： Cree, Inc.

发明人： Daniel J. Lichtenwalner ,  Edward R. Van Brunt ,  Brett Hull

IPC分类号： H01L29/06 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

摘要： Semiconductor devices include a semiconductor layer structure comprising a drift region that includes a wide band-gap semiconductor material. A shielding pattern is provided in an upper portion of the drift region in an active region of the device and a termination structure is provided in the upper portion of the drift region in a termination region of the device. A gate trench extends into an upper surface of the semiconductor layer structure. The semiconductor layer structure includes a semiconductor layer that extends above and at least partially covers the termination structure.

公开(公告)号：US09887287B1

公开(公告)日：2018-02-06

申请号：US15372516

申请日：2016-12-08

申请人： Cree, Inc.

发明人： Daniel J. Lichtenwalner ,  Edward R. Van Brunt ,  Brett Hull ,  Alexander V. Suvorov ,  Craig Capell

IPC分类号： H01L29/423 ,  H01L29/74 ,  H01L29/80 ,  H01L21/337 ,  H01L21/336 ,  H01L29/78 ,  H01L29/06 ,  H01L27/088 ,  H01L29/66

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L29/0623 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7811

摘要： Semiconductor devices include a semiconductor layer structure having a wide band-gap semiconductor drift region having a first conductivity type. A gate trench is provided in an upper portion of the semiconductor layer structure, the gate trench having first and second opposed sidewalls that extend in a first direction in the upper portion of the semiconductor layer structure. These devices further include a deep shielding pattern having a second conductivity type that is opposite the first conductivity type in the semiconductor layer structure underneath a bottom surface of the gate trench, and a deep shielding connection pattern that has the second conductivity type in the first sidewall of the gate trench. The devices include a semiconductor channel region that has the first conductivity type in the second sidewall of the gate trench.

公开(公告)号：US20140246790A1

公开(公告)日：2014-09-04

申请号：US13783644

申请日：2013-03-04

申请人： CREE, INC.

发明人： Sarah Kay Haney ,  Brett Hull ,  Daniel Namishia

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/48 ,  H01L21/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L29/41741 ,  H01L29/42308 ,  H01L29/42372 ,  H01L29/74 ,  H01L29/7802 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/056 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/0612 ,  H01L2224/06181 ,  H01L2224/29101 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/38 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of a semiconductor device including a floating bond pad are disclosed. In one preferred embodiment, the semiconductor device is a power semiconductor device. In one embodiment, the semiconductor device includes a substrate that includes an active area and a control contact area, a first bond pad on the active area, a floating control bond pad on the control contact area and laterally extending over a portion of the first bond pad, and a dielectric between the portion of the first bond pad and the floating control bond pad. The floating control bond pad enables the active area to extend below the floating control bond pad, which in turn decreases a size of the power semiconductor device for a particular rated current or, conversely, increases a size of the active area and thus a rated current for a particular semiconductor die size.

摘要翻译： 公开了包括浮动焊盘的半导体器件的实施例。 在一个优选实施例中，半导体器件是功率半导体器件。 在一个实施例中，半导体器件包括衬底，其包括有源区和控制接触区，有源区上的第一接合焊盘，控制接触区上的浮动控制接合焊盘，并横向延伸超过第一接合部分 垫，以及在第一接合焊盘的部分和浮动控制接合焊盘之间的电介质。 浮动控制接合焊盘使得有源区域能够延伸到浮动控制接合焊盘之下，这进一步降低了功率半导体器件在特定额定电流下的尺寸，或者相反地增加了有效面积的大小，从而增加了额定电流 对于特定的半导体管芯尺寸。