公开(公告)号：US07172908B2

公开(公告)日：2007-02-06

申请号：US10906357

申请日：2005-02-15

Applicant: Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

Inventor： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

IPC: H01L21/00

CPC classification number: H01L43/12 ,  H01L27/228

Abstract: An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

公开(公告)号：US20060238925A1

公开(公告)日：2006-10-26

申请号：US10907974

申请日：2005-04-22

Applicant: Yu-Jen Wang ,  Chih-Huang Lai ,  Wen-Chin Lin ,  Denny Tang ,  Chao-Hsiung Wang

Inventor： Yu-Jen Wang ,  Chih-Huang Lai ,  Wen-Chin Lin ,  Denny Tang ,  Chao-Hsiung Wang

IPC: G11B5/33 ,  G11B5/127

CPC classification number: G11B5/3929 ,  B82Y10/00 ,  G11B2005/3996

Abstract: Disclosed herein is a magnetoresistive structure, for example useful as a spin-valve or GMR stack in a magnetic sensor, and a fabrication method thereof. The magnetoresistive structure uses twisted coupling to induce a perpendicular magnetization alignment between the free layer and the pinned layer. Ferromagnetic layers of the free and pinned layers are exchange-coupled using antiferromagnetic layers having substantially parallel exchange-biasing directions. Thus, embodiments can be realized that have antiferromagnetic layers formed of a same material and/or having a same blocking temperature. At least one of the free and pinned layers further includes a second ferromagnetic layer and an insulating layer, such as a NOL, between the two ferromagnetic layers. The insulating layer causes twisted coupling between the two ferromagnetic layers, rotating the magnetization direction of one 90 degrees relative to the magnetization direction of the other.

Abstract translation: 这里公开了一种例如在磁传感器中用作自旋阀或GMR堆叠的磁阻结构及其制造方法。 磁阻结构使用扭转耦合来引起自由层和被钉扎层之间的垂直磁化对准。 使用具有基本平行的交换偏压方向的反铁磁层来交换耦合自由和被钉扎层的铁磁层。 因此，可以实现具有由相同材料形成的反铁磁层和/或具有相同阻挡温度的实施例。 自由和被钉扎层中的至少一个还包括在两个铁磁层之间的第二铁磁层和绝缘层，例如NOL。 绝缘层引起两个铁磁层之间的扭转耦合，使相对于另一个的磁化方向旋转90度的磁化方向。

公开(公告)号：US20050243598A1

公开(公告)日：2005-11-03

申请号：US11115422

申请日：2005-04-27

Applicant: Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai ,  Chao-Hsiung Wang ,  Fang-Shi Lai

Inventor： Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai ,  Chao-Hsiung Wang ,  Fang-Shi Lai

IPC: G11C11/00 ,  G11C11/16

CPC classification number: G11C11/1673

Abstract: A non-destructive technique and related array for writing and reading magnetic memory cells, including sampling a first signal of a selected read line corresponding to select memory cells, applying a magnetic field to the select memory cells, sampling a second signal of the selected read line, and comparing the first and second signals to determine a logic state of the select memory cells.

Abstract translation: 一种用于写入和读取磁存储单元的非破坏性技术和相关阵列，包括对与选择存储器单元相对应的所选读取行的第一信号进行采样，向选择存储单元施加磁场，对所选择的读取的第二信号 并且比较第一和第二信号以确定选择存储器单元的逻辑状态。

公开(公告)号：US20050180203A1

公开(公告)日：2005-08-18

申请号：US10780171

申请日：2004-02-16

Applicant: Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai

Inventor： Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai

IPC: G11C11/14 ,  G11C11/16

CPC classification number: G11C11/16 ,  G11C2213/72 ,  G11C2213/74

Abstract: In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.

Abstract translation: 在一个示例中，MRAM存储器阵列包括多个字线，与字线交叉的多个位线，以及多个第一和第二二极管以及磁性隧道结存储器。 每个第一二极管包括阴极和耦合到每个位线的阳极。 每个第二二极管包括阳极和耦合到每个字线的阴极。 磁性隧道结存储器包括钉扎层，自由层和非磁性层。 非磁性层位于被钉扎层和自由层之间。 每个二极管位于位线和字线的交叉点处，并连接在相应交叉位线处的第一二极管和相应交叉字线处的第二二极管之间。

公开(公告)号：US08828745B2

公开(公告)日：2014-09-09

申请号：US13176790

申请日：2011-07-06

Applicant: Wei-Che Tsao ,  Chia-Lin Hsu ,  Jen-Chieh Lin ,  Teng-Chun Tsai ,  Hsin-Kuo Hsu ,  Ya-Hsueh Hsieh ,  Ren-Peng Huang ,  Chih-Hsien Chen ,  Wen-Chin Lin ,  Yung-Lun Hsieh

Inventor： Wei-Che Tsao ,  Chia-Lin Hsu ,  Jen-Chieh Lin ,  Teng-Chun Tsai ,  Hsin-Kuo Hsu ,  Ya-Hsueh Hsieh ,  Ren-Peng Huang ,  Chih-Hsien Chen ,  Wen-Chin Lin ,  Yung-Lun Hsieh

IPC: H01L21/66 ,  H01L21/306 ,  H01L21/304 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/321

CPC classification number: H01L21/31053 ,  H01L21/3212 ,  H01L21/76898 ,  H01L22/12 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.

Abstract translation: 一种制造TSV的方法，其中该方法包括以下几个步骤：提供具有基板和ILD层（层间电介质层）的堆叠结构，其中穿透ILD层并进一步延伸到基板中的开口是 形成。 在堆叠结构和开口的侧壁上形成绝缘体层和金属阻挡层之后，在堆叠结构上形成顶部金属层以实现开口。 进行停止在阻挡层上的第一平面化处理以去除顶部金属层的一部分。 随后进行停止在ILD层上的第二平坦化处理以去除金属阻挡层的一部分，绝缘体层的一部分和顶部金属层的一部分，其中第二平坦化工艺具有由光线确定的抛光终点 干涉测量或电机电流。

公开(公告)号：US08263959B2

公开(公告)日：2012-09-11

申请号：US11746315

申请日：2007-05-09

Applicant: Chao-Hsiung Wang ,  Li-Shyue Lai ,  Denny Tang ,  Wen-Chin Lin

Inventor： Chao-Hsiung Wang ,  Li-Shyue Lai ,  Denny Tang ,  Wen-Chin Lin

IPC: H01L29/04

CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1675 ,  H01L45/1683

Abstract: A method of manufacturing a memory device is provided. The method includes forming an electrode over a substrate. The method also includes forming an opening in the electrode to provide a tapered electrode contact surface proximate the opening. The method further includes forming a phase change feature over the electrode and on the tapered electrode contact surface.

Abstract translation: 提供一种制造存储器件的方法。 该方法包括在衬底上形成电极。 该方法还包括在电极中形成开口以提供靠近开口的锥形电极接触表面。 该方法还包括在电极上和锥形电极接触表面上形成相变特征。

公开(公告)号：US07622358B2

公开(公告)日：2009-11-24

申请号：US11241574

申请日：2005-09-30

Applicant: Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  Hsu Chen Cheng

Inventor： Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  Hsu Chen Cheng

IPC: H01L21/76

CPC classification number: H01L21/76 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/266 ,  H01L21/823481 ,  H01L21/823878 ,  H01L27/08

Abstract: A method for forming semi-insulating portions in a semiconductor substrate provides depositing a hardmask film over a semiconductor substructure to a thickness sufficient to prevent charged particles from passing through the hardmask. The hardmask is patterned creating openings through which charged particles pass and enter the substrate during an implantation process. The semi-insulating portions may extend deep into the semiconductor substrate and electrically insulate devices formed on opposed sides of the semi-insulating portions. The charged particles may advantageously be protons and further substrate portions covered by the patterned hardmask film are substantially free of the charged particles.

Abstract translation: 在半导体衬底中形成半绝缘部分的方法提供了将半导体衬底上的硬掩模膜沉积到足以防止带电粒子穿过硬掩模的厚度。 硬掩模被图案化以产生开孔，在注入过程中带电粒子通过该开口进入衬底。 半绝缘部分可以深深地延伸到半导体衬底中并且电绝缘形成在半绝缘部分的相对侧上的器件。 带电粒子可以有利地是质子，并且由图案化的硬掩模膜覆盖的另外的基底部分基本上没有带电粒子。

公开(公告)号：US20090140285A1

公开(公告)日：2009-06-04

申请号：US12202439

申请日：2008-09-02

Applicant: Shun-Tian Lin ,  Wen-Hsiang Chien ,  Wen-Chin Lin ,  Jyun-Wei Huang ,  Sin-Sian Wu

Inventor： Shun-Tian Lin ,  Wen-Hsiang Chien ,  Wen-Chin Lin ,  Jyun-Wei Huang ,  Sin-Sian Wu

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H05K3/32 ,  F21K9/233 ,  F21V7/22 ,  F21V29/505 ,  F21V29/745 ,  F21V29/767 ,  F21Y2115/10 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K3/4015 ,  H05K2201/10106 ,  H05K2201/10242 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10962 ,  H01L2924/00014

Abstract: A light-emitting device of a light-emitting diode (LED) and a manufacture method thereof are provided. The light-emitting device includes a post-like metal material, a printed circuit board, conductors, insulators, light-emitting diodes, wires, and an encapsulating material. The light-emitting device has through holes, in which conductors are disposed and surrounded with the insulators. One end of each conductor is connected to the printed circuit board to form a composite structure heat-dissipation substrate. The light-emitting diodes are disposed on the post-like metal material, connected to the conductors via the wires, and encapsulated by the encapsulating material. Furthermore, the light-emitting diodes, the wires, and the encapsulating material can be combined into a light-emitting unit. Moreover, red, blue, and green light-emitting diodes can be combined and the color of output light thereof can be adjusted by controlling the input signal.

Abstract translation: 提供了一种发光二极管（LED）的发光装置及其制造方法。 发光装置包括柱状金属材料，印刷电路板，导体，绝缘体，发光二极管，导线和封装材料。 发光装置具有通孔，其中导体被布置并被绝缘体包围。 每个导体的一端连接到印刷电路板上以形成复合结构的散热基片。 发光二极管设置在柱状金属材料上，经由导线连接到导体，并由封装材料封装。 此外，发光二极管，导线和封装材料可以组合成发光单元。 此外，可以组合红色，蓝色和绿色发光二极管，并且可以通过控制输入信号来调节其输出光的颜色。

公开(公告)号：US20080186757A1

公开(公告)日：2008-08-07

申请号：US11743453

申请日：2007-05-02

Applicant: Wen-Chin Lin ,  Hsu-Chen Cheng ,  Yu-Jen Wang ,  Denny Tang

Inventor： Wen-Chin Lin ,  Hsu-Chen Cheng ,  Yu-Jen Wang ,  Denny Tang

IPC: G11C11/00

CPC classification number: G11C11/16 ,  G11C11/005 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed herein is a technique for created an advanced MRAM array for constructing a memory integrated circuit chip. More specifically, the disclosed principles provide for an integrated circuit memory chip comprised of a combination of at least one of an array of high-speed magnetic memory cells, and at least one of an array of high-density magnetic memory cells. Accordingly, a memory chip constructed as disclosed herein provides the benefit of both high-speed and high-density memory cells on the same memory chip. As a result, applications benefiting from the use of (or perhaps even needing) high-speed memory cells are provided by the memory cells in the high-speed memory cell array.

Abstract translation: 这里公开了一种用于创建用于构建存储器集成电路芯片的高级MRAM阵列的技术。 更具体地，所公开的原理提供了由高速磁存储器单元的阵列中的至少一个和高密度磁存储单元阵列中的至少一个的组合构成的集成电路存储器芯片。 因此，如本文所公开的构造的存储器芯片提供了在相同存储器芯片上的高速和高密度存储器单元的益处。 结果，受益于使用（或甚至需要的）高速存储器单元的应用由高速存储单元阵列中的存储单元提供。

公开(公告)号：US07270702B1

公开(公告)日：2007-09-18

申请号：US11452909

申请日：2006-06-15

Applicant: Wen-Chin Lin ,  Tzu-Kwei Sun ,  Jen-Fang Lin

Inventor： Wen-Chin Lin ,  Tzu-Kwei Sun ,  Jen-Fang Lin

IPC: C09D11/00 ,  C09B29/036 ,  C09B67/22

CPC classification number: C09D11/32 ,  C09B29/363

Abstract: The present invention discloses a yellow dye compound having a structure of the following formula (I): wherein M is H, Li, NH4 or Na. The dye compound of the present invention is particularly applied to yellow dye compound for paper-printing ink jet ink and can be made into yellow ink jet ink with greenish yellow, wide color gamut, and excellent solubility.

Abstract translation: 本发明公开了具有下式（I）结构的黄色染料化合物：其中M为H，Li，NH 4或Na。 本发明的染料化合物特别适用于纸张喷墨油墨的黄色染料化合物，并且可以制成具有黄绿色，宽色域和优异溶解性的黄色喷墨油墨。