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57 条记录 (耗时 0.026 秒)

    Process of manufacturing a semiconductor device
    21.
    发明授权
    Process of manufacturing a semiconductor device 失效
    制造半导体器件的工艺

    公开(公告)号：US5665616A

    公开(公告)日：1997-09-09

    申请号：US731012

    申请日：1996-10-09

    申请人： Koji Kimura ,  Hiroshi Naruse

    发明人： Koji Kimura ,  Hiroshi Naruse

    IPC分类号： H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/732 ,  H01L21/265

    CPC分类号： H01L27/0623 ,  H01L21/8249

    摘要： In the Bi-CMOS process of manufacturing a semiconductor device by an effective combination of a bipolar transistor manufacturing process and a CMOS transistor manufacturing process in the case of the formation of a silicide film on a Bi-CMOS device, in which the bipolar transistor having an inner base region made of a silicon film grown by epitaxy and the MOS transistor having silicide formed on the gate electrode, source region and drain region in a self-aligned manner therewith are formed on the same semiconductor substrate, while the silicon film of the inner base region is epitaxially grown in a step, a silicon film is also epitaxially grown on the source/drain regions at the same time in the same step.

    摘要翻译： 在双极晶体管制造工艺和CMOS晶体管制造工艺的有效组合的Bi-CMOS工艺中，在Bi-CMOS器件上形成硅化物膜的情况下，其中双极晶体管具有 通过外延生长的硅膜制成的内基区域和在其自对准方式上形成在栅电极，源区和漏区上的具有硅化物的MOS晶体管形成在同一半导体衬底上，而硅膜 内部基极区域在步骤中外延生长，在同一步骤中同时在源极/漏极区域上外延生长硅膜。

    Method of manufacturing a hetero bipolar transistor
    23.
    发明授权
    Method of manufacturing a hetero bipolar transistor 失效
    异质双极晶体管的制造方法

    公开(公告)号：US5399511A

    公开(公告)日：1995-03-21

    申请号：US280199

    申请日：1994-07-25

    申请人： Shin-ichi Taka ,  Kouji Kimura ,  Hiroshi Naruse ,  Kuniaki Kumamaru

    发明人： Shin-ichi Taka ,  Kouji Kimura ,  Hiroshi Naruse ,  Kuniaki Kumamaru

    IPC分类号： H01L29/165 ,  H01L21/331 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L21/265

    CPC分类号： H01L29/66242 ,  H01L29/7378

    摘要： The specification discloses a hetero bipolar transistor which comprises a semiconductor substrate, a first silicon layer serving as a collector, a first silicon-germanium layer serving as a base, a second silicon layer serving as a collector, and a second silicon-germanium layer. A side wall of the second silicon-germanium layer is in contact with side walls of the first silicon layer, the first silicon-germanium layer and the second silicon layer. The second silicon-germanium layer is disposed to surround the first silicon layer, the first silicon-germanium layer, and the second silicon layer, and has an energy band gap substantially the same as that of the first silicon-germanium layer.

    摘要翻译： 该说明书公开了一种异质双极晶体管，其包括半导体衬底，用作集电极的第一硅层，用作基极的第一硅 - 锗层，用作集电极的第二硅层和第二硅 - 锗层。 第二硅 - 锗层的侧壁与第一硅层，第一硅 - 锗层和第二硅层的侧壁接触。 第二硅锗层被设置为围绕第一硅层，第一硅 - 锗层和第二硅层，并且具有与第一硅 - 锗层基本相同的能带隙。

    Flotation process for copper ores and copper smelter slags
    24.
    发明授权
    Flotation process for copper ores and copper smelter slags 失效
    铜矿和铜冶炼炉渣浮选工艺

    公开(公告)号：US4022686A

    公开(公告)日：1977-05-10

    申请号：US659965

    申请日：1976-02-20

    申请人： Akira Arakatsu ,  Hajime Nakazawa ,  Hiroshi Naruse

    发明人： Akira Arakatsu ,  Hajime Nakazawa ,  Hiroshi Naruse

    IPC分类号： B03D1/004 ,  B03D1/02 ,  C11D1/02 ,  C11D1/58 ,  C11D1/65 ,  C11D1/66 ,  C11D1/835 ,  B03D1/06

    CPC分类号： B03D1/014 ,  B03D1/006 ,  B03D1/012 ,  B03D2201/02 ,  B03D2203/02

    摘要： A flotation process in which copper ores or copper converter slags are ground and firstly have added thereto benzotriazole or alkyl benzotriazole as an activator and secondly one or more collectors selected from the group consisting of xanthates, dithiophosphates, thiocarbamate esters, dithiocarbamates, mercaptans and dixanthogens and further, if desired, a promoter such as kerosene, light oil, bunker oil or petroleum lubricant is added to improve the recovery for the flotation of copper ores or copper smelter slags.

    摘要翻译： 一种浮选方法，其中将铜矿石或铜转炉炉渣研磨并首先加入苯并三唑或烷基苯并三唑作为活化剂，其次是一种或多种选自黄原酸盐，二硫代磷酸盐，硫代氨基甲酸酯，二硫代氨基甲酸盐，硫醇和二恶烷的收集剂，以及 此外，如果需要，加入促进剂如煤油，轻油，燃油或石油润滑剂以改善铜矿石或铜冶炼炉渣的浮选回收。

    Network management system
    27.
    发明授权
    Network management system 失效
    网络管理系统

    公开(公告)号：US5513343A

    公开(公告)日：1996-04-30

    申请号：US217703

    申请日：1994-03-25

    申请人： Hiroshi Sakano ,  Hiroshi Naruse ,  Akihiko Masubuchi ,  Ikuko Tachibana

    发明人： Hiroshi Sakano ,  Hiroshi Naruse ,  Akihiko Masubuchi ,  Ikuko Tachibana

    IPC分类号： G06F13/00 ,  G06F11/25 ,  G06F11/32 ,  H04L12/24 ,  H04L29/14 ,  G06F11/00

    CPC分类号： H04L41/16 ,  G06F11/2257 ,  G06F11/327 ,  H04L41/0631 ,  H04L41/0686

    摘要： The present invention relates to a network management system, and more particularly to a network management system for managing the states of plural alarm information generating from each one of the objects, which are to be managed, and stored in a state management area.Detailed information storage program of agents stores into detailed information files detailed information contained in alarm information transmitted from objects; alarm information coding program of a manager converts alarm information into alarm codes; and state management program stores the alarm codes into a state management area. A knowledge base enters combinations of alarm codes and effects of alarm information as decision patterns, and failure decision program decides upon failures by matching, at the time of receiving alarm information, the knowledge base and the state management area with each other.

    摘要翻译： 网络管理系统技术领域本发明涉及一种网络管理系统，更具体地说，涉及一种网络管理系统，用于管理从待管理的每个对象生成的多个报警信息的状态，并存储在状态管理区域中。 代理商的详细信息存储程序存储到详细信息文件中，包含在从对象传输的报警信息中的详细信息; 管理员的报警信息编码程序将报警信息转换为报警代码; 状态管理程序将报警代码存储到状态管理区域。 知识库将报警代码和报警信息的效果组合作为决策模式，故障决策程序通过匹配，在接收到报警信息时知识库和状态管理区域进行匹配来决定故障。

    Method of manufacturing a bonded semiconductor substrate and a dielectric isolated bipolar transistor
    28.
    发明授权
    Method of manufacturing a bonded semiconductor substrate and a dielectric isolated bipolar transistor 失效
    制造键合半导体衬底和介质隔离双极晶体管的方法

    公开(公告)号：US5476813A

    公开(公告)日：1995-12-19

    申请号：US340361

    申请日：1994-11-14

    申请人： Hiroshi Naruse

    发明人： Hiroshi Naruse

    IPC分类号： H01L29/73 ,  H01L21/02 ,  H01L21/18 ,  H01L21/331 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/20

    CPC分类号： H01L21/76243 ,  H01L21/76256 ,  Y10S148/012 ,  Y10S148/051 ,  Y10S148/058 ,  Y10S148/15 ,  Y10S438/97 ,  Y10S438/977

    摘要： In a method of manufacturing a bonded semiconductor substrate, a SiGe mixed crystal layer, a silicon layer containing N-type impurities, a SiGe mixed crystal layer containing N-type impurities of high concentration, and a silicon layer containing N-type impurities of high concentration are formed in this order on a top surface of a silicon substrate by an epitaxial growth process to form a first semiconductor substrate. A silicon oxide film is formed on a surface of a silicon substrate to form a second semiconductor substrate. The first and second semiconductor substrates are bonded to each other by heat treatment, with their top surfaces contacting each other. The first semiconductor substrate is etched from the back surface thereof until the SiGe mixed crystal layer is exposed, and the SiGe mixed crystal layer is etched until the silicon layer containing N-type impurities is exposed. This method prevents the thickness of the element forming layer from varying.

    摘要翻译： 在制造接合半导体衬底的方法中，SiGe混晶层，含有N型杂质的硅层，含有高浓度N型杂质的SiGe混合层和含有高浓度N型杂质的硅层 通过外延生长工艺在硅衬底的顶表面上依次形成浓度以形成第一半导体衬底。 在硅衬底的表面上形成氧化硅膜以形成第二半导体衬底。 第一和第二半导体衬底通过热处理彼此接合，并且它们的顶表面彼此接触。 从其背面蚀刻第一半导体衬底，直到暴露SiGe混晶层，并且蚀刻SiGe混晶层，直到暴露含有N型杂质的硅层。 该方法防止元件形成层的厚度变化。

    Hetero bipolar transistor and method of manufacturing the same
    29.
    发明授权
    Hetero bipolar transistor and method of manufacturing the same 失效
    异质双极晶体管及其制造方法

    公开(公告)号：US5365090A

    公开(公告)日：1994-11-15

    申请号：US45707

    申请日：1993-04-14

    申请人： Shin-ichi Taka ,  Kouji Kimura ,  Hiroshi Naruse ,  Kuniaki Kumamaru

    发明人： Shin-ichi Taka ,  Kouji Kimura ,  Hiroshi Naruse ,  Kuniaki Kumamaru

    IPC分类号： H01L29/165 ,  H01L21/331 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/72

    CPC分类号： H01L29/66242 ,  H01L29/7378

    摘要： The specification discloses a hetero bipolar transistor which comprises a semiconductor substrate, a first silicon layer serving as a collector, a first silicon-germanium layer serving as a base, a second silicon layer serving as a collector, and a second silicon-germanium layer. A side wall of the second silicon-germanium layer is in contact with side walls of the first silicon layer, the first silicon-germanium layer and the second silicon layer. The second silicon-germanium layer is disposed to surround the first silicon layer, the first silicon-germanium layer, and the second silicon layer, and has an energy band gap substantially the same as that of the first silicon-germanium layer.

    摘要翻译： 该说明书公开了一种异质双极晶体管，其包括半导体衬底，用作集电极的第一硅层，用作基极的第一硅 - 锗层，用作集电极的第二硅层和第二硅 - 锗层。 第二硅 - 锗层的侧壁与第一硅层，第一硅 - 锗层和第二硅层的侧壁接触。 第二硅锗层被设置为围绕第一硅层，第一硅 - 锗层和第二硅层，并且具有与第一硅 - 锗层基本相同的能带隙。