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    Interconnect structures for logic and memory devices and methods of fabrication
    23.
    发明授权
    Interconnect structures for logic and memory devices and methods of fabrication 有权

    公开(公告)号：US11430944B2

    公开(公告)日：2022-08-30

    申请号：US16358671

    申请日：2019-03-19

    Applicant: Intel Corporation

    Inventor： Christopher Wiegand ,  Gokul Malyavanatham ,  Oleg Golonzka

    IPC: H01L43/02 ,  H01L27/24 ,  H01L27/22 ,  H01L45/00 ,  H01L43/12

    Abstract: An apparatus includes a first interconnect structure above a substrate, a memory device above and coupled with the first interconnect structure in a memory region. The memory device includes a non-volatile memory element, an electrode on the non-volatile memory element, and a metallization structure on a portion of the electrode. The apparatus further includes a second interconnect structure in a logic region above the substrate, where the second interconnect structure is laterally distant from the first interconnect structure. The logic region further includes a second metallization structure coupled to the second interconnect structure and a conductive structure between the second metallization structure and the second interconnect structure. The apparatus further includes a dielectric spacer that extends from the memory device to the conductive structure.

    MAGNETIC MEMORY DEVICES AND METHODS OF FABRICATION
    29.
    发明申请
    MAGNETIC MEMORY DEVICES AND METHODS OF FABRICATION 审中-公开

    公开(公告)号：US20200006632A1

    公开(公告)日：2020-01-02

    申请号：US16024427

    申请日：2018-06-29

    Applicant: Intel Corporation

    Inventor： Daniel Ouellette ,  Justin Brockman ,  Tofizur Rahman ,  Angeline Smith ,  Andrew Smith ,  Christopher Wiegand ,  Oleg Golonzka

    IPC: H01L43/02 ,  H01L27/22 ,  H01F10/32

    Abstract: A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.

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