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    GPU MIXED PRIMITIVE TOPOLOGY TYPE PROCESSING
    23.
    发明申请
    GPU MIXED PRIMITIVE TOPOLOGY TYPE PROCESSING 有权

    公开(公告)号：US20210012452A1

    公开(公告)日：2021-01-14

    申请号：US16943984

    申请日：2020-07-30

    Applicant: Intel Corporation

    Inventor： John Gierach ,  Abhishek Venkatesh ,  Travis Schluessler ,  Devan Burke ,  Tomer Bar-On ,  Michael Apodaca

    IPC: G06T1/20 ,  G06T17/10

    Abstract: Embodiments are generally directed to GPU mixed primitive topology type processing. An embodiment of an apparatus includes one or more processor cores; and a memory to store data for graphics processing, wherein the one or more processing cores are to generate in the memory a vertex buffer to store vertex data for a mesh to be rendered and an index buffer to index the vertex data stored in the vertex buffer, the index buffer being structured to include index data for multiple primitive topology types. The one or more processor cores are to process the index data for the plurality of primitive topology types from the index buffer and fetch vertex data from the vertex buffer; and are to set up each primitive topology type of the plurality of primitive topology types for processing in a single draw operation.

    Automatic partitioning techniques for multi-phase pixel shading
    29.
    发明授权
    Automatic partitioning techniques for multi-phase pixel shading 有权
    多相像素着色自动分割技术

    公开(公告)号：US09536342B2

    公开(公告)日：2017-01-03

    申请号：US14461047

    申请日：2014-08-15

    Applicant: INTEL CORPORATION

    Inventor： Uzi Sarel ,  Tomer Bar-On ,  Jacob Subag

    IPC: G06T15/20 ,  G06T15/80 ,  G06T15/00 ,  G06F9/455

    CPC classification number: G06T15/005 ,  G06F9/455

    Abstract: Automatic partitioning techniques for multi-phase pixel shading are described. In an example embodiment, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to determine one or more respective suitability metrics for each of one or more candidate partitioning policies for a set of pixel shader inputs for a graphics frame, each candidate partitioning policy comprising one or more rules for partitioning the set of pixel shader inputs for multi-phase pixel shading based on quality sensitivity values for the pixel shader inputs, select a partitioning policy for the set of pixel shader inputs from among the one or more candidate partitioning policies based on the determined suitability metrics, and construct a multi-phase pixel shader for the graphics frame by partitioning the set of pixel shader inputs into multiple classes according to the selected partitioning policy. Other embodiments are described and claimed.

    Abstract translation: 描述了多相像素着色的自动划分技术。 在示例实施例中，装置可以包括其硬件中的至少一部分的逻辑，用于为图形的一组像素着色器输入确定一个或多个候选分区策略中的每一个的一个或多个相应的适合性度量的逻辑 帧，每个候选分区策略包括用于基于用于像素着色器输入的质量敏感度值来分割用于多相位像素着色的多个像素着色器输入的集合的一个或多个规则，从所述像素着色器输入的集合中选择所述像素着色器输入的分区策略 基于所确定的适合性度量的一个或多个候选分区策略，并且根据所选择的分区策略，将所述像素着色器输入集合划分为多个类，从而构建用于所述图形帧的多相像素着色器。 描述和要求保护其他实施例。

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