公开(公告)号：US20200029086A1

公开(公告)日：2020-01-23

申请号：US16584873

申请日：2019-09-26

Applicant: Intel Corporation

Inventor： Yi Zou ,  Gang Shen ,  Jun Tian

IPC: H04N19/436 ,  H04N19/172 ,  H04N19/40

Abstract: In one embodiment, an apparatus comprises processing circuitry to: receive, via a communication interface, a frame of a video stream; determine a number of subframes to be encoded in parallel for the frame; partition the frame into a plurality of subframes based on the number of subframes to be encoded in parallel; and send, via the communication interface, the plurality of subframes to a cluster of encoding servers, wherein the cluster of encoding servers is to encode the plurality of subframes in parallel, and wherein each subframe of the plurality of subframes is to be encoded by a particular encoding server of the cluster of encoding servers.

公开(公告)号：US10230809B2

公开(公告)日：2019-03-12

申请号：US15056622

申请日：2016-02-29

Applicant: Intel Corporation

Inventor： Arun Raghunath ,  Michael Mesnier ,  Yi Zou

IPC: G06F15/167 ,  H04L29/08 ,  G06F3/06 ,  G06F12/0813 ,  H04L12/879 ,  G06F12/0868 ,  G06F12/0888

Abstract: Technologies for managing replica caching in a distributed storage system include a storage manager device. The storage manager device is configured to receive a data write request to store replicas of data. Additionally, the storage manager device is configured to designate one of the replicas as a primary replica, select a first storage node to store the primary replica of the data in a cache storage and at least a second storage node to store a non-primary replica of the data in a non-cache storage. The storage manager device is further configured to include a hint in a first replication request to the first storage node that the data is to be stored in the cache storage of the first storage node as the primary replica. Further, the storage manager device is configured to transmit replication requests to the respective storage nodes. Other embodiments are described and claimed.

公开(公告)号：US20190042090A1

公开(公告)日：2019-02-07

申请号：US15922493

申请日：2018-03-15

Applicant: Intel Corporation

Inventor： Arun Raghunath ,  Anjaneya Reddy Chagam Reddy ,  Sujoy Sen ,  Yi Zou

IPC: G06F3/06 ,  G06F13/42 ,  G06F13/40 ,  G06F13/16

Abstract: Technologies for separating control plane management from data plane management for distributed storage in a disaggregated architecture include a compute sled. The compute sled includes a network interface controller and circuitry to receive, through a network and with the network interface controller, a data access request from a compute device. The data access request includes a data payload indicative of an object to be stored. The circuitry is also to map the object to a set of multiple data storage sleds for distributed storage of the object. Additionally, the circuitry is to send, through the network and with a local data bus protocol mapped onto a network protocol, a write request to the mapped data storage sleds to store the object in one or more data storage devices located on each data storage sled. Other embodiments are also described and claimed.

公开(公告)号：US10083742B2

公开(公告)日：2018-09-25

申请号：US15276588

申请日：2016-09-26

Applicant: INTEL CORPORATION

Inventor： Wei Wu ,  Jawad B. Khan ,  Sanjeev N. Trika ,  Yi Zou

IPC: G11C16/04 ,  G11C11/56 ,  G11C29/52 ,  G06F11/10

CPC classification number: G11C11/5628 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3427 ,  G11C16/349 ,  G11C29/021 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0409

Abstract: Provided are a method and apparatus for programming non-volatile memory using a multi-cell storage cell group to provide error location information for retention errors. Each storage cell in the non-volatile memory is programmed with threshold voltage levels and each storage cell is programmed from bits from a plurality of pages. A memory controller organizes the storage cells into storage cell groups, each storing m bits of information programmed with the threshold voltage levels. A determination is made of one threshold voltage level to use for each of the storage cells in the storage cell group to program a selected k bits in the storage cell group with threshold voltage levels defining one of a plurality of valid states. The threshold voltage levels for at least one of the storage cells of the storage cell group in any two valid states differ by at least two threshold voltage levels.

公开(公告)号：US20170251073A1

公开(公告)日：2017-08-31

申请号：US15056622

申请日：2016-02-29

Applicant: Intel Corporation

Inventor： Arun Raghunath ,  Michael Mesnier ,  Yi Zou

IPC: H04L29/08 ,  G06F12/08 ,  H04L12/879 ,  G06F3/06

CPC classification number: H04L67/2842 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/067 ,  G06F12/0813 ,  G06F12/0868 ,  G06F12/0888 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/154 ,  G06F2212/222 ,  G06F2212/285 ,  G06F2212/60 ,  G06F2212/62 ,  H04L49/901 ,  H04L67/02 ,  H04L67/1097

Abstract: Technologies for managing replica caching in a distributed storage system include a storage manager device. The storage manager device is configured to receive a data write request to store replicas of data. Additionally, the storage manager device is configured to designate one of the replicas as a primary replica, select a first storage node to store the primary replica of the data in a cache storage and at least a second storage node to store a non-primary replica of the data in a non-cache storage. The storage manager device is further configured to include a hint in a first replication request to the first storage node that the data is to be stored in the cache storage of the first storage node as the primary replica. Further, the storage manager device is configured to transmit replication requests to the respective storage nodes. Other embodiments are described and claimed.