公开(公告)号：US09412334B2

公开(公告)日：2016-08-09

申请号：US14633997

申请日：2015-02-27

Applicant: JAPAN DISPLAY INC.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Masato Hiramatsu

IPC: G02F1/1335 ,  G09G5/02 ,  G02F1/1362 ,  G09G3/36

CPC classification number: G09G5/02 ,  G02F1/133514 ,  G02F1/136209 ,  G02F2001/133521 ,  G02F2001/136222 ,  G02F2201/346 ,  G02F2202/104 ,  G09G3/3607

Abstract: According to one embodiment, a liquid crystal display device includes an array substrate including a first color filter configured to transmit light in a first wavelength range, a second color filter configured to transmit light in a second wavelength range of greater wavelengths than the first wavelength range, a first switching element disposed above the second color filter, a second switching element disposed above the second color filter, a first pixel electrode which is electrically connected to the first switching element and is located above the first color filter, and a second pixel electrode which is electrically connected to the second switching element and is located above the second color filter.

公开(公告)号：US20160149047A1

公开(公告)日：2016-05-26

申请号：US14944711

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Takashi Okada ,  Masayoshi Fuchi ,  Akihiro Hanada

IPC: H01L29/786 ,  H01L23/00 ,  H01L21/385 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.

Abstract translation: 根据一个实施例，薄膜晶体管及其制造方法在使用氧化物半导体层时实现薄膜晶体管的尺寸减小。 氧化物半导体层包括沟道区，源极区和漏极区。 栅电极配置在与氧化物半导体层的沟道区隔开的位置，以面对沟道区。 源极电极与氧化物半导体层的源极区电连接。 漏电极与氧化物半导体层的漏区电连接。 底涂层邻接氧化物半导体层的源极区和漏极区。 氢阻挡层的氢浓度低于底涂层中的氢浓度，并分离底涂层和氧化物半导体层的沟道区。

公开(公告)号：US11656488B2

公开(公告)日：2023-05-23

申请号：US17851110

申请日：2022-06-28

Applicant: Japan Display Inc.

Inventor： Arichika Ishida ,  Yasushi Kawata

IPC: G02F1/1333 ,  H01L51/00

CPC classification number: G02F1/1333 ,  G02F1/133305 ,  H01L51/0097 ,  G02F1/133302 ,  G02F1/133351 ,  G02F1/133354 ,  G02F2201/54 ,  H01L2924/0002 ,  Y02E10/549 ,  Y02P70/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.

公开(公告)号：US20210141256A1

公开(公告)日：2021-05-13

申请号：US17126112

申请日：2020-12-18

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1343

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US20190198533A1

公开(公告)日：2019-06-27

申请号：US16286146

申请日：2019-02-26

Applicant: Japan Display Inc.

Inventor： Yuichiro Hanyu ,  Arichika Ishida ,  Masahiro Watabe

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/49

CPC classification number: H01L27/1237 ,  G02F1/133345 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2201/501 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02274 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02675 ,  H01L27/1225 ,  H01L27/1229 ,  H01L27/1233 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1274 ,  H01L27/3262 ,  H01L29/4908 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869

Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.

公开(公告)号：US10290657B2

公开(公告)日：2019-05-14

申请号：US15867847

申请日：2018-01-11

Applicant: Japan Display Inc.

Inventor： Yuichiro Hanyu ,  Arichika Ishida ,  Masahiro Watabe

IPC: H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L27/32 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1362

Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.

公开(公告)号：US09947798B2

公开(公告)日：2018-04-17

申请号：US14804395

申请日：2015-07-21

Applicant: Japan Display Inc.

Inventor： Hidekazu Miyake ,  Arichika Ishida ,  Norihiro Uemura ,  Hiroto Miyake ,  Isao Suzumura ,  Yohei Yamaguchi

IPC: G02F1/136 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  H01L27/1218 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a display device includes thin-film transistor. The thin-film transistor includes a first semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a second semiconductor layer, a first electrode and a second electrode. The gap between the bottom surface of the gate electrode and the upper surface of the first channel region of the first semiconductor layer is larger than the gap between the upper surface of the gate electrode and the bottom surface of the second channel region of the second semiconductor layer.

公开(公告)号：US09804315B2

公开(公告)日：2017-10-31

申请号：US14722808

申请日：2015-05-27

Applicant: Japan Display Inc.

Inventor： Yoshiro Aoki ,  Yasushi Kawata ,  Arichika Ishida

IPC: F21V8/00 ,  G02F1/1339 ,  G02F1/1345

CPC classification number: G02B6/0011 ,  G02F1/1339 ,  G02F1/13452

Abstract: According to one embodiment, provided is a liquid crystal display device with a reduced size and little restriction for incorporation into other devices. The liquid crystal display device includes an array substrate that includes multiple thin film transistors for pixel driving. The liquid crystal display device also includes a counter substrate disposed in a manner opposed to the array substrate. The liquid crystal display device further includes an FPC arranged to transmit an external signal for driving of the thin film transistors. One of the array substrate and the counter substrate has an outline larger than that of the other, disposed on the display side, and includes a connecting portion at a position not opposed to the other on the side opposite to the display side. At least one end portion of the FPC is connected to the connecting portion, while the other end portion extends inward.

公开(公告)号：US09647130B2

公开(公告)日：2017-05-09

申请号：US14834933

申请日：2015-08-25

Applicant: Japan Display Inc.

Inventor： Arichika Ishida

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/24 ,  H01L29/49

CPC classification number: H01L29/7869 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/78633

Abstract: According to one embodiment, a display device includes a thin-film transistor. The thin-film transistor includes a gate electrode, an insulating layer disposed to superpose the gate electrode, and a semiconductor layer disposed on the insulating layer. The gate electrode is opposed to at least the semiconductor layer in part. The gate electrode includes a laminate including a first layer containing silicon as a main component and a second layer which contains titanium as a main component and which is in contact with the first layer, and is in contact with the insulating layer.

公开(公告)号：US09618813B2

公开(公告)日：2017-04-11

申请号：US14990201

申请日：2016-01-07

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.