Spark Plug Having a Ceramic Insulator with Improved High Temperature Electrical Properties
    23.
    发明申请
    Spark Plug Having a Ceramic Insulator with Improved High Temperature Electrical Properties 有权
    具有改进的高温电气特性的陶瓷绝缘体的火花塞

    公开(公告)号:US20080143229A1

    公开(公告)日:2008-06-19

    申请号:US11611946

    申请日:2006-12-18

    申请人: William J. Walker

    发明人: William J. Walker

    IPC分类号: H01T13/38

    摘要: A spark plug which includes a center electrode metal shell and an insulator disposed therebetween utilizes for the insulator or ceramic with improved high temperature electrical properties which includes alumina in an amount between about 90 and about 99% by weight, a zirconium containing compound in an amount between about 0 and about 1% by weight, and an oxide mixture in an amount between about 1 and about 10% by weight. The oxide mixture includes a glass former, a network modifier and alumina in an amount between about 16% and about 40% by weight after firing, wherein the molar ratio of the glass former to the network modifier ranges between about 0.8:1 and 1.2:1. The ceramic insulator is particularly adapted for use as an insulator in a spark plug to provide improved dielectric strength and shunt resistance of greater than one 1000 megaohms at 1000 degrees Fahrenheit, so as to reduce the shunting of the spark plug and thereby improve the quality of the spark generated by the spark plug.

    摘要翻译: 包括中心电极金属壳和设置在其间的绝缘体的火花塞利用具有改进的高温电性能的绝缘体或陶瓷,其包括约90重量%至约99重量%之间的氧化铝,量为含锆化合物 约0至约1重量%,以及约1至约10重量%的量的氧化物混合物。 氧化物混合物包括玻璃形成剂,网络改性剂和煅烧后约16%至约40%重量的氧化铝,其中玻璃形成剂与网络改性剂的摩尔比在约0.8:1至1.2:1之间, 1。 陶瓷绝缘子特别适合用作火花塞中的绝缘体,以在1000华氏度时提供大于一千千兆欧姆的改善的介电强度和分流电阻,以便减少火花塞的分流,从而提高火花塞的质量 由火花塞产生的火花。

    Network communication device including bonded ports for increased bandwidth
    24.
    发明授权
    Network communication device including bonded ports for increased bandwidth 失效
    网络通信设备包括用于增加带宽的绑定端口

    公开(公告)号:US06665733B1

    公开(公告)日:2003-12-16

    申请号:US08936072

    申请日:1997-09-23

    IPC分类号: G06F1516

    摘要: A network communication device including port control circuitry for controlling packet flow between the ports of the device, where the port control circuitry includes a port manager that directs packets between the ports and port bonding circuitry that bonds two or more of the ports into a bonded port set. For each packet to be sent via the bonded port set, the port bonding circuitry selects one of the bonded ports for transmitting the packet. More than one bonded port set may be defined in a given communication device, and each bonded port set may include from two ports up to all the ports of the device, as long as each port is included in only one bonded port set. One or more port bonding registers are provided to identify which of the plurality of ports are bonded in each bonded port set. In one embodiment, the bonded ports are selected on a packet by packet basis so as to achieve a relatively even distribution of packets sent by each bonded port. In an alternative embodiment bonded ports are assigned to packet source identifiers so as to achieve a relatively even distribution of source identifiers among the bonded ports. If bonded ports are assigned to particular source identifiers, then the traffic is preferably monitored and the assignments are periodically adjusted to achieve even distribution of packet flow on the bonded link. The bonded ports may have different bandwidths, in which case traffic is distributed on a proportionate basis.

    摘要翻译: 一种网络通信设备,包括用于控制设备端口之间的分组流的端口控制电路,其中端口控制电路包括端口管理器,该端口管理器在端口之间引导分组,以及将两个或多个端口绑定到绑定端口的端口绑定电路 组。 对于要通过绑定端口组发送的每个分组,端口绑定电路选择用于发送分组的绑定端口之一。 可以在给定的通信设备中定义多于一个的绑定端口组,并且每个绑定端口组可以包括直到设备的所有端口的两个端口,只要每个端口仅包括在一个绑定端口组中。 提供一个或多个端口绑定寄存器以识别在每个绑定端口组中绑定多个端口中的哪一个。 在一个实施例中,按照分组的方式选择绑定端口,以便实现每个绑定端口发送的分组的相对均匀的分布。 在替代实施例中,绑定端口被分配给分组源标识符,以便在绑定端口之间实现源标识符的相对均匀的分布。 如果绑定端口被分配给特定源标识符,则优选地监视业务并且周期性地调整分配以实现绑定链路上的分组流的均匀分布。 绑定端口可以具有不同的带宽,在这种情况下,业务量按比例分配。

    Pinless connector interposer and method for making the same
    25.
    发明授权
    Pinless connector interposer and method for making the same 失效
    无针连接器插入器及其制造方法

    公开(公告)号:US4548451A

    公开(公告)日:1985-10-22

    申请号:US604701

    申请日:1984-04-27

    摘要: A pinless connector interposer for making densely populated, inexpensive, simple, reliable, self-wiping connections between components used in semiconductor packaging such as semiconductor carrying substrates, flexible and rigid printed circuit boards and cards. The connector interposer comprises an elastomeric base member in which deformable protrusions are formed on both the top and bottom surface of the base member, wherein the protrusions correspond to contact pads of semiconductor packaging components. An electrically conductive metal coated flexible overlay is bonded to the base member, forming electrically conductive tab elements, enabling a multitude of connections to be made to a semiconductor package. The connections can be accommodated on centers as low as 0.025 inches, despite the non-planarity that may exist between the packaging components of a system.

    摘要翻译: 一种无针连接器插入器,用于在诸如半导体承载基板,柔性和刚性印刷电路板和卡之类的半导体封装中使用的部件之间进行密集的,廉价的,简单的,可靠的自擦拭连接。 连接器插入件包括一个弹性基底构件,其中可变形的突起形成在基底构件的顶表面和底表面上,其中突起对应于半导体封装构件的接触垫。 导电金属涂覆的柔性覆盖层结合到基底构件上,形成导电突片元件,使得可以对半导体封装进行多个连接。 尽管在系统的包装部件之间可能存在非平面性,连接可以容纳在低至0.025英寸的中心。

    Technique for improving processor performance
    26.
    发明授权
    Technique for improving processor performance 失效
    提高处理器性能的技术

    公开(公告)号:US07120758B2

    公开(公告)日:2006-10-10

    申请号:US10365018

    申请日:2003-02-12

    IPC分类号: G06F12/00 G06F3/00

    CPC分类号: G06F13/1673

    摘要: Method and apparatus for improving processor performance. In some embodiments, processing speed may be improved by reusing data stored in a buffer during an initial request by subsequent requests. Assignment of temporary storage buffers in a controller may be made to allow for the potential for reuse of the data. Further, a hot buffer may be designated to allow for reuse of the data stored in the hot buffer. On subsequent requests, data stored in the hot buffer may be sent to a requesting device without re-retrieving the data from memory.

    摘要翻译: 提高处理器性能的方法和装置。 在一些实施例中,可以通过在初始请求期间通过后续请求重用存储在缓冲器中的数据来改善处理速度。 控制器中的临时存储缓冲区的分配可以做出以允许数据重用的潜力。 此外,可以指定热缓冲器以允许重新使用存储在热缓冲器中的数据。 在随后的请求中,存储在热缓冲器中的数据可以被发送到请求设备而不从存储器重新检索数据。

    Memory sub-system error cleansing
    27.
    发明授权
    Memory sub-system error cleansing 失效
    内存子系统错误清理

    公开(公告)号:US06845472B2

    公开(公告)日:2005-01-18

    申请号:US09769956

    申请日:2001-01-25

    IPC分类号: G06F11/10 G11C29/42 G06F11/00

    CPC分类号: G11C29/42 G06F11/106

    摘要: A system and technique for detecting data errors in a memory device. More specifically, data errors in a memory device are detected by initiating an internal READ command or cleansing operation from a set of logic which is internal to the memory system in which the memory devices reside. Rather than relying on a READ command to be issued from an external device, via a host controller, the cleansing logic initiates a cleansing routine in response to an event such as an operator instruction or a periodic schedule. By implementing the cleansing operation, the system does not rely on external READ commands to verify data integrity. Further, a monitoring device is coupled between the cleansing logic and a memory scheduler. The monitoring device provides a feed back mechanism from which to vary the frequency of certain memory requests such as the cleansing and scrubbing operations. The cleansing routine may rely on typical ECC error logging mechanisms and may be used in a RAID memory architecture. Further, the cleansing routine may be used in conjunction with other error logging and correction logic, as well as scrubbing logic.

    摘要翻译: 一种用于检测存储器件中的数据错误的系统和技术。 更具体地,通过从存储器设备所在的存储器系统内部的一组逻辑启动内部READ命令或清除操作来检测存储器件中的数据错误。 清洁逻辑不是依赖于通过主机控制器从外部设备发出READ命令,而是响应诸如操作者指令或周期性调度的事件来启动清洗程序。 通过实施清洁操作,系统不依赖外部READ命令来验证数据完整性。 此外,监视设备耦合在清洁逻辑和存储器调度器之间。 监测装置提供反馈机构,从而改变某些存储器请求的频率,例如清洁和擦洗操作。 清洁程序可能依赖于典型的ECC错误记录机制,并可用于RAID存储器架构。 此外,清洁程序可以与其他错误记录和校正逻辑以及擦洗逻辑结合使用。

    Network switch including a switch manager for periodically polling the network ports to determine their status and controlling the flow of data between ports
    28.
    发明授权
    Network switch including a switch manager for periodically polling the network ports to determine their status and controlling the flow of data between ports 失效
    网络交换机包括交换机管理器,用于周期性地轮询网络端口以确定其状态并控制端口之间的数据流

    公开(公告)号:US06260073B1

    公开(公告)日:2001-07-10

    申请号:US08774605

    申请日:1996-12-30

    IPC分类号: G06F1516

    摘要: A network switch including one or more network ports for receiving and transmitting data is disclosed. The network switch also includes a processor, a switch manager, and memory. Each port includes a network interface, a data bus interface, and a processor port interface. A data bus is coupled to the data bus interface of each of the ports and the switch manager. A processor bus is coupled to a processor, the switch manager, and to the processor port interface of each of the ports. A memory bus is coupled to the memory and the switch manager. The switch manager periodically polls each of the network ports to determine the status of each port. The switch manager controls the flow of data between the network ports and memory based on the port status. The separate processor bus allows the processor to perform overhead functions, such as monitoring, determining status and configuration, without consuming valuable data bus bandwidth.

    摘要翻译: 公开了一种包括用于接收和发送数据的一个或多个网络端口的网络交换机。 网络交换机还包括处理器,交换机管理器和存储器。 每个端口包括网络接口,数据总线接口和处理器端口接口。 数据总线耦合到每个端口和交换机管理器的数据总线接口。 处理器总线耦合到处理器,交换机管理器以及每个端口的处理器端口接口。 存储器总线耦合到存储器和开关管理器。 交换机管理器定期轮询每个网络端口,以确定每个端口的状态。 交换机管理器根据端口状态控制网络端口和内存之间的数据流。 单独的处理器总线允许处理器执行开销功能,例如监视,确定状态和配置,而不消耗有价值的数据总线带宽。

    Network switch with shared memory system
    29.
    发明授权
    Network switch with shared memory system 失效
    具有共享内存系统的网络交换机

    公开(公告)号:US06233242B1

    公开(公告)日:2001-05-15

    申请号:US08774557

    申请日:1996-12-30

    IPC分类号: H04L1246

    摘要: A network switch including a central memory that stores device identification information, port numbers, control information, and packet data received at the ports of the switch. The memory includes a packet section that stores packet data and a device identification section that stores identification entries, where each entry corresponds to a network device coupled to a port of the switch. The switch includes a switch manager to control data flow between the ports and the central memory. Each of the identification entries includes a unique network address to identify one of the network devices and a port number to identify one of the network ports. Each of the identification entries is located within the central memory at a hash address derived by hashing the unique network address. Hash logic receives and hashes each network address to determine a hash address, which is used to access the identification entries. The memory is organized into a chain structure to enable quick access of entries. The switch manager further includes a control memory for storing control registers, including a freepool control register for identifying a freepool chain of memory sectors, a receive control register for identifying a corresponding receive sector chain and a transmit control register for identifying a corresponding transmit packet chain for each of the ports.

    摘要翻译: 一种网络交换机,包括存储在交换机的端口处接收的设备标识信息,端口号,控制信息和分组数据的中央存储器。 存储器包括存储分组数据的分组部分和存储标识条目的设备标识部分,其中每个条目对应于耦合到交换机的端口的网络设备。 交换机包括一个交换机管理器来控制端口和中央存储器之间的数据流。 每个标识条目包括用于识别网络设备之一的唯一网络地址和用于识别其中一个网络端口的端口号。 每个识别条目位于中央存储器内的哈希地址处,通过散列唯一的网络地址而导出。 散列逻辑接收和散列每个网络地址以确定用于访问标识条目的散列地址。 存储器被组织成链结构以便能够快速访问条目。 开关管理器还包括用于存储控制寄存器的控制存储器,包括用于识别存储器扇区的频带链的自由频控制寄存器,用于识别对应的接收扇区链的接收控制寄存器和用于识别对应的发送分组链的发送控制寄存器 为每个端口。

    Network switch with a multiple bus structure and a bridge interface for
transferring network data between different buses
    30.
    发明授权
    Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses 失效
    具有多总线结构的网络交换机和用于在不同总线之间传送网络数据的网桥接口

    公开(公告)号:US6098110A

    公开(公告)日:2000-08-01

    申请号:US777501

    申请日:1996-12-30

    摘要: A network switch including a plurality of first network ports, a plurality of second network ports, a first bus, a second bus and a bridge interface coupled between the first and second buses. The first ports receive and transmit network data according to a first network protocol and the second ports receive and transmit network data according to a second network protocol. The first and second buses operate according to different bus standards. The bridge interface enables data transfer between the first and second buses and thus between the networks operating at different protocols. The switch includes a switch manager that controls the flow of network data and a processor for performing supervisory and control functions. The bridge interface includes receive buffers and transmit buffers assigned to respective ports. During packet data transfer operations across the first bus, the bridge interface emulates a first network port. During packet data transfer operations across the second bus, the bridge interface primarily acts as a slave to the second network ports by storing control lists for execution by the second network ports. This processor is relieved of performing necessary overhead functions associated with the second bus and is thus freed to perform other important switch functions.

    摘要翻译: 一种包括多个第一网络端口,多个第二网络端口,第一总线,第二总线和耦合在第一和第二总线之间的桥接口的网络交换机。 第一端口根据第一网络协议接收和发送网络数据,并且第二端口根据第二网络协议接收和发送网络数据。 第一和第二辆公交车根据不同的总线标准运行。 桥接口使得能够在第一和第二总线之间以及因此在以不同协议运行的网络之间进行数据传输。 交换机包括控制网络数据流的交换机管理器和用于执行监控和控制功能的处理器。 桥接口包括分配给相应端口的接收缓冲区和发送缓冲区。 在跨第一总线的分组数据传输操作期间,网桥接口模拟第一个网络端口。 在跨第二总线的分组数据传输操作期间,网桥接口主要通过存储用于由第二网络端口执行的控制列表而作为第二网络端口的从设备。 该处理器不需要执行与第二总线相关联的必要开销功能,因此可以释放以执行其他重要的开关功能。