公开(公告)号：US09281471B2

公开(公告)日：2016-03-08

申请号：US14266365

申请日：2014-04-30

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Tsz W. Chan ,  Swapnil Lengade ,  Everett Allen McTeer ,  Shu Qin

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/165 ,  H01L45/1675

Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.

Abstract translation: 已经公开了用于制造存储器件的存储器件和方法。 一种这样的存储器件包括形成在字线材料上的第一电极材料。 在第一电极材料上形成选择器装置材料。 第二电极材料形成在选择器装置材料上。 在第二电极材料上形成相变材料。 在相变材料上形成第三电极材料。 粘附物质是等离子体掺杂到存储器堆叠的侧壁中，并且衬垫材料形成在存储器堆叠的侧壁上。 粘附物质与存储器堆叠和侧壁衬套的元件混合以终止元件和侧壁衬套的不满足的原子键。

公开(公告)号：US09257646B2

公开(公告)日：2016-02-09

申请号：US14618936

申请日：2015-02-10

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/76 ,  H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.

Abstract translation: 一些实施例包括具有第一电极的存储器单元，以及在第一电极之上并直接抵靠第一电极的中间材料。 中间材料包括对应于碳和硼之一或两者的稳定物质。 存储单元还具有超过并直接抵靠中间材料的开关材料，开关材料上方的离子储存器材料以及离子储存器材料上的第二电极。 一些实施例包括形成存储器单元的方法。

公开(公告)号：US09093367B2

公开(公告)日：2015-07-28

申请号：US13929590

申请日：2013-06-27

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Shu Qin ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/26 ,  H01L21/42 ,  H01L21/223 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L21/2236 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26526 ,  H01L29/66575

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract translation: 一些实施例包括在半导体衬底中形成一个或多个掺杂区域的方法。 可以使用等离子体掺杂来形成第一掺杂剂到衬底内的第一深度。 然后可以用第二掺杂剂冲击第一掺杂剂以将第一掺杂剂敲入衬底内的第二深度。 在一些实施方案中，第一掺杂剂是p型（例如硼），第二掺杂剂是中性型（例如锗）。 在一些实施方案中，第二掺杂剂比第一掺杂剂重。

公开(公告)号：US20150206906A1

公开(公告)日：2015-07-23

申请号：US14599886

申请日：2015-01-19

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Haitao Liu ,  Zhenyu Lu

IPC: H01L27/12 ,  H01L29/04 ,  H01L21/285 ,  H01L21/02 ,  H01L21/223 ,  H01L21/324 ,  H01L27/115 ,  H01L29/16

CPC classification number: H01L27/1222 ,  H01J37/32412 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/02595 ,  H01L21/2236 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/324 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/16 ,  H01L29/66757

Abstract: Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped polycrystalline silicon. The doped polycrystalline silicon is then annealed. The hydrogen plasma doping and the annealing are decoupled.

Abstract translation: 公开了形成薄膜晶体管和存储器的方法。 在一种这样的方法中，多晶硅是掺杂氢的等离子体以形成掺杂的多晶硅。 然后将掺杂的多晶硅退火。 氢等离子体掺杂和退火是去耦合的。

公开(公告)号：US08822877B2

公开(公告)日：2014-09-02

申请号：US13868886

申请日：2013-04-23

Applicant: Micron Technology, Inc.

Inventor： Shu Qin

IPC: B23K10/00

CPC classification number: H01L21/67109 ,  B23K10/00 ,  H01J37/32522 ,  H01J37/32935 ,  H01J2237/2001 ,  H01L21/2636 ,  H01L21/67248

Abstract: Rapid thermal processing systems and associated methods are disclosed herein. In one embodiment, a method for heating a microelectronic substrate include generating a plasma, applying the generated plasma to a surface of the microelectronic substrate, and raising a temperature of the microelectronic substrate with the generated plasma applied to the surface of the microelectronic substrate. The method further includes continuing to apply the generated plasma until the microelectronic substrate reaches a desired temperature.

Abstract translation: 本文公开了快速热处理系统和相关方法。 在一个实施例中，用于加热微电子衬底的方法包括产生等离子体，将所产生的等离子体施加到微电子衬底的表面，以及利用所产生的等离子体将微电子衬底的温度提高到微电子衬底的表面。 该方法还包括继续施加所产生的等离子体，直到微电子衬底达到所需温度。

公开(公告)号：US20140197416A1

公开(公告)日：2014-07-17

申请号：US13739679

申请日：2013-01-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Shu Qin ,  Haitao Liu ,  Zhenyu Lu

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01J37/32412 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/02595 ,  H01L21/2236 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/324 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/16 ,  H01L29/66757

Abstract: Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped polycrystalline silicon. The doped polycrystalline silicon is then annealed. The hydrogen plasma doping and the annealing are decoupled.

Abstract translation: 公开了形成薄膜晶体管和存储器的方法。 在一种这样的方法中，多晶硅是掺杂氢的等离子体以形成掺杂的多晶硅。 然后将掺杂的多晶硅退火。 氢等离子体掺杂和退火是去耦合的。

公开(公告)号：US08497194B2

公开(公告)日：2013-07-30

申请号：US13674674

申请日：2012-11-12

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Shu Qin ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/26 ,  H01L21/42

CPC classification number: H01L21/2236 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26526 ,  H01L29/66575

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

公开(公告)号：US20230187254A1

公开(公告)日：2023-06-15

申请号：US18165119

申请日：2023-02-06

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

CPC classification number: H01L21/6833 ,  H01L21/76251

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US20230044518A1

公开(公告)日：2023-02-09

申请号：US17971376

申请日：2022-10-21

Applicant: Micron Technology, Inc.

Inventor： Santanu Sarkar ,  Jay Steven Brown ,  Shu Qin ,  Yongjun Jeff Hu ,  Farrell Martin Good

IPC: H01L21/02 ,  H01L21/3105

Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.

公开(公告)号：US11508573B2

公开(公告)日：2022-11-22

申请号：US15930875

申请日：2020-05-13

Applicant: Micron Technology, Inc.

Inventor： Santanu Sarkar ,  Jay Steven Brown ,  Shu Qin ,  Yongjun Jeff Hu ,  Farrell Martin Good

IPC: H01L21/02 ,  H01L21/3105 ,  H01L27/24

Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.