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    Memory Array Comprising Strings Of Memory Cells
    27.
    发明申请
    Memory Array Comprising Strings Of Memory Cells 有权

    公开(公告)号：US20210351127A1

    公开(公告)日：2021-11-11

    申请号：US17385299

    申请日：2021-07-26

    Applicant: Micron Technology, Inc.

    Inventor： Yi Hu ,  Harsh Narendrakumar Jain ,  Matthew J. King

    IPC: H01L23/522 ,  H01L23/528 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11524 ,  H01L21/311 ,  H01L21/762

    Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The intervening material comprises longitudinally-alternating first and second regions that individually have a vertically-elongated seam therein. The vertically-elongated seam in the first regions has a higher top than in the second regions. The seam tops in the second regions are elevationally-coincident with or below a bottom of an uppermost of the conductive tiers. Methods are disclosed.

    Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts
    29.
    发明授权
    Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts 有权

    公开(公告)号：US12267997B2

    公开(公告)日：2025-04-01

    申请号：US18394273

    申请日：2023-12-22

    Applicant: Micron Technology, Inc.

    Inventor： Lifang Xu ,  Sidhartha Gupta ,  Kar Wui Thong ,  Harsh Narendrakumar Jain

    IPC: H10B41/27 ,  G11C5/06 ,  H01L29/66 ,  H01L29/78 ,  H10B43/27

    Abstract: A method of forming a microelectronic device including a first stack structure comprising alternating levels of insulative structures and other insulative structures, forming strings of memory cells through the first stack structure, forming a second stack structure over the first stack structure, based at least partially on observed amount of pillar bending within the first stack structure, forming a first tailored reticle specific to the observed amount of pillar bending, utilizing the first tailored reticle to form openings extending through the second stack structure and over some of the strings of memory cells, wherein centers of the openings over the strings of memory cells are at least substantially aligned with the centers of uppermost surfaces of the strings of memory cells in a direction of the observed pillar bending, and forming upper pillars extending through the second stack structure and over some of the strings of memory cells.

    Memory device including self-aligned conductive contacts
    30.
    发明授权
    Memory device including self-aligned conductive contacts 有权

    公开(公告)号：US12218008B2

    公开(公告)日：2025-02-04

    申请号：US18200852

    申请日：2023-05-23

    Applicant: Micron Technology, Inc.

    Inventor： Kar Wui Thong ,  Harsh Narendrakumar Jain ,  John Hopkins

    IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/535 ,  H10B41/27 ,  H10B43/27

    Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes levels of conductive materials interleaved with levels of dielectric materials; memory cell strings including respective pillars extending through the levels of conductive materials and the levels of dielectric materials; a dielectric structure formed in a slit, the slit extending through the levels of conductive materials and the levels of dielectric materials, the dielectric structure separating the levels of conductive materials and the levels of dielectric materials into a first portion and a second portion; first conductive structures located over and coupled to respective pillars of the first memory cell strings; second conductive structures located over and coupled to respective pillars of the second memory cell strings; and a conductive line contacting the dielectric structure, a conductive structure of the first conductive structures, and a conductive structure of the second conductive structures.

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