公开(公告)号：US20180145033A1

公开(公告)日：2018-05-24

申请号：US15663042

申请日：2017-07-28

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Moon Hee YI ,  Byoung Chan KIM ,  Yong Ho BAEK ,  Jung Hyun CHO

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/25171 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/00

Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, a semiconductor chip disposed in the through-hole, at least one component-embedded substrate disposed adjacent the semiconductor chip in the through-hole and spaced apart from the semiconductor chip by a predetermined distance and having a plurality of passive components embedded therein, an encapsulant encapsulating at least portions of the first connection member, the at least one component-embedded substrate, and the semiconductor chip, and a second connection member disposed on the first connection member, the at least one component-embedded substrate, and the semiconductor chip. The first and second connection members each include redistribution layers electrically connected to the connection pads of the semiconductor chip, and the plurality of passive components embedded in the at least one component-embedded substrate are electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

公开(公告)号：US20180130750A1

公开(公告)日：2018-05-10

申请号：US15681839

申请日：2017-08-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Dae Kwon JUNG ,  Bang Chul KO ,  Chul CHOI ,  Jung Hyun CHO ,  Joo Hwan JUNG ,  Yong Ho BAEK ,  Seung Eun LEE

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L27/146 ,  H04N5/335 ,  H04N5/225

CPC classification number: H01L23/5389 ,  H01L23/3114 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/20 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L2224/214 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/146 ,  H01L2924/3511 ,  H04N5/2253 ,  H04N5/2257 ,  H04N5/335

Abstract: The present disclosure relates to an image sensor device including: a fan-out semiconductor package including a first semiconductor chip having an active surface on which a connection pad is disposed, a first connection member disposed on the active surface and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, and a sealing material disposed on the first connection member and sealing at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the first connection member and electrically connected to the first connection member; and a third semiconductor chip disposed on the second semiconductor chip and electrically connected to the second semiconductor chip, in which at least one of the second semiconductor chip or the third semiconductor chip may be an image sensor. The present disclosure also relates to an image sensor module including the image sensor device.

公开(公告)号：US20180102332A1

公开(公告)日：2018-04-12

申请号：US15837611

申请日：2017-12-11

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Byoung Chan KIM ,  Yong Ho BAEK

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29

CPC classification number: H01L24/02 ,  H01L23/293 ,  H01L23/3178 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/1712 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06582

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a processor chip disposed in the through-hole; a memory chip disposed in the through-hole and including a plurality of dies stacked on each other; an encapsulant encapsulating at least portions of the first interconnection member, the memory chip, and the processor chip; and a second interconnection member disposed on the first interconnection member, an active surface of the memory chip, and an active surface of the processor chip. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to connection pads of the processor chip and connection pads of the memory chip, and the connection pads of the processor chip and the connection pads of the memory chip are electrically connected to each other by the redistribution layer of the second interconnection member.

公开(公告)号：US20180068911A1

公开(公告)日：2018-03-08

申请号：US15796411

申请日：2017-10-27

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Jung Hyun CHO ,  Jae Hoon CHOI

IPC: H01L21/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L22/34 ,  H01L21/565 ,  H01L23/31 ,  H01L23/5226 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2224/05599 ,  H01L2224/45099

Abstract: A board for an electronic component package includes a wiring part on which an electronic component is disposed, wherein the wiring part includes an insulating layer, a signal transferring wiring electrically connected to the electronic component, and an electrical testing wiring electrically disconnected from the electronic component, and the electrical testing wiring includes conductive patterns formed on both surfaces of the wiring part, and conductive vias electrically connecting the conductive patterns to each other.

公开(公告)号：US20190173184A1

公开(公告)日：2019-06-06

申请号：US15949386

申请日：2018-04-10

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Il KIM ,  Young Sik HUR ,  Yong Ho BAEK ,  Jin Seon PARK

IPC: H01Q9/04 ,  H01Q1/38 ,  G06K19/077 ,  H01Q23/00

Abstract: An antenna module includes a connection member, an integrated circuit (IC), a dielectric layer, antenna members, feed vias, and a plating member. The connection member includes one or more wiring layer(s) and insulating layer(s). The IC is disposed on one surface of the connection member and is electrically connected to the wiring layer(s). The dielectric layer is disposed on another surface of the connection member. The antenna members are disposed in the dielectric layer, and the feed vias are disposed in the dielectric layer so that each has one end electrically connected to a corresponding antenna member and the other end electrically connected to a corresponding one of the wiring layer(s). The plating member is disposed in the dielectric layer to surround side surfaces of the feed vias. The dielectric layer has a dielectric constant Dk greater than that of at least one insulating layer.

公开(公告)号：US20190139912A1

公开(公告)日：2019-05-09

申请号：US15949439

申请日：2018-04-10

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Il KIM ,  Yong Ho BAEK ,  Jin Seon PARK ,  Young Sik HUR

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/24

Abstract: An antenna module includes a fan-out semiconductor package including an IC, an encapsulant encapsulating at least a portion of the IC, a core member having a first side surface facing the IC or the encapsulant, and a connection member including at least one wiring layer electrically connected to the IC and the core member and at least one insulating layer; and an antenna package including a plurality of first directional antenna members configured to transmit or receive a first RF signal. The fan-out semiconductor package further includes at least one second directional antenna member disposed on a second side surface of the core member opposing the first side surface of the core member, stood up from a position electrically connected to at least one wiring layer, and configured to transmit or receive a second RF signal.

公开(公告)号：US20190115310A1

公开(公告)日：2019-04-18

申请号：US16218203

申请日：2018-12-12

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Doo Il KIM ,  Young Sik HUR ,  Jung Hyun CHO ,  Won Wook SO

IPC: H01L23/66 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

Abstract: A composite antenna substrate and semiconductor package module includes: a fan-out semiconductor package including a semiconductor chip, an encapsulant encapsulating at least portions of the semiconductor chip, and a connection member including a redistribution layer electrically connected to connection pads; and an antenna substrate including an antenna member including antenna patterns, ground patterns, and feed lines, and a wiring member disposed below the antenna member and including wiring layers including feeding patterns electrically connected to the feed lines.

公开(公告)号：US20190051989A1

公开(公告)日：2019-02-14

申请号：US16005951

申请日：2018-06-12

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： DOO IL KIM ,  Yong Ho BAEK ,  Jin Seon PARK ,  Young Sik HUR

IPC: H01Q15/08 ,  H01Q1/38 ,  H01L23/66

Abstract: An antenna module includes: a connection member including at least one wiring layer and at least one insulating layer; an integrated circuit (IC) disposed on a first surface of the connection member and electrically connected to the at least one wiring layer; an antenna package including antenna members configured to transmit or receive a radio frequency (RF) signal, a feed vias each having one end electrically connected to a respective one of the antenna members and another end electrically connected to the at least one wiring layer, and a dielectric layer having a height greater than a height of the at least one insulating layer, and having a first surface facing a second surface of the connection member; and dielectric members disposed in positions corresponding to the antenna members on the second surface of the antenna package.

公开(公告)号：US20180294299A1

公开(公告)日：2018-10-11

申请号：US15828993

申请日：2017-12-01

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Jung Hyun CHO ,  Min Keun KIM ,  Young Sik HUR ,  Tae Hee HAN

IPC: H01L27/146 ,  H01L27/32 ,  H01L23/00 ,  G02B5/20 ,  G06K9/00

Abstract: There are provided a fan-out sensor package and an optical fingerprint sensor module including the same. The fan-out sensor package includes: a connection member having a through-hole; an image sensor disposed in the through-hole of the connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the connection member, the image sensor, and an optical lens; and a redistribution layer disposed on the connection member, the image sensor, and the optical lens. The connection member includes a wiring layer, and the redistribution layer electrically connects the wiring layer and the connection pads to each other.

公开(公告)号：US20180076156A1

公开(公告)日：2018-03-15

申请号：US15468606

申请日：2017-03-24

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Byoung Chan KIM ,  Yong Ho BAEK

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L25/065

CPC classification number: H01L24/02 ,  H01L23/293 ,  H01L23/3178 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/1712 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06582

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a processor chip disposed in the through-hole; a memory chip disposed in the through-hole and including a plurality of dies stacked on each other; an encapsulant encapsulating at least portions of the first interconnection member, the memory chip, and the processor chip; and a second interconnection member disposed on the first interconnection member, an active surface of the memory chip, and an active surface of the processor chip. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to connection pads of the processor chip and connection pads of the memory chip, and the connection pads of the processor chip and the connection pads of the memory chip are electrically connected to each other by the redistribution layer of the second interconnection member.