Memory device and test method thereof

    公开(公告)号:US11437118B2

    公开(公告)日:2022-09-06

    申请号:US17073682

    申请日:2020-10-19

    Abstract: A memory device includes: a plurality of sense amplifier circuits sensing a data bit in response to a parallel test signal from a plurality of banks; a plurality of comparators comparing the data bit from each of the plurality of sense amplifier circuits with a test bit; and a logic circuit receiving output signals of the plurality of comparators and outputting a test result, wherein each of the plurality of comparators receives the test bit, an evolved parallel bit test (PBT) signal, at least one test ignore signal, and a test pass signal, and compares the data bit and the test bit in response to the evolved parallel bit test (PBT) signal, the at least one logic state test setting signal, and the test pass signal, and passes a corresponding bank regardless of a test operation in response to the test pass signal.

    Mixer for reducing local frequency signal generated at output of the mixer

    公开(公告)号:US10763789B2

    公开(公告)日:2020-09-01

    申请号:US16740317

    申请日:2020-01-10

    Abstract: The disclosure relates to a communication method and system for converging a 5G communication system for supporting higher data rates beyond a 4G system with an IoT technology. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car or connected car, healthcare, digital education, retail, security and safety-related services. The disclosure provides a mixer including a first impedance connected in parallel to a mixer output transformer and configured to remove a primary local frequency component generated at an output of the mixer, and a second impedance connected in parallel to the mixer output transformer and configured to remove a secondary local frequency component generated at the output of the mixer, wherein the first impedance operates as a series resonator in a primary local frequency band, and the second impedance operates as a parallel resonator in a secondary local frequency band.

    Three dimensional semiconductor memory device

    公开(公告)号:US10256250B2

    公开(公告)日:2019-04-09

    申请号:US15708266

    申请日:2017-09-19

    Abstract: A three-dimensional semiconductor memory device is provided. A stacked structure is formed on a substrate. The stacked structure includes conductive patterns vertically stacked on the substrate. A selection structure including selection conductive patterns is stacked on the stacked structure. A channel structure penetrates the selection structure and the stacked structure to connect to the substrate. An upper interconnection line crosses the selection structure. A conductive pad is disposed on the channel structure to electrically connect the upper interconnection line to the channel structure. A bottom surface of the conductive pad is positioned below a top surface of the uppermost selection conductive pattern of the selection conductive patterns.

    Method of transmitting and receiving power and electronic device using the same

    公开(公告)号:US10128669B2

    公开(公告)日:2018-11-13

    申请号:US15138316

    申请日:2016-04-26

    Abstract: An electronic device comprising: a battery having a plurality of cells that are connected in series; a circuit electrically connected to the battery; and a conductive pattern electrically connected to the circuit, wherein the circuit is configured to: receive a first signal wirelessly from a first external device by using the conductive pattern, charge at least some of the plurality of cells in the battery by using a power of the first signal, generate a second signal by changing a first voltage, that is produced by at least two of the plurality of cells in the battery, into a second voltage that is lower than the first voltage, and wirelessly transmit the second signal to a second external device, the second signal being transmitted by using the conductive pattern.

Patent Agency Ranking