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公开(公告)号:US20190115275A1
公开(公告)日:2019-04-18
申请号:US15783533
申请日:2017-10-13
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , CH Chew , Yushuang YAO
Abstract: Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending from the first side to the second side of the substrate and positioned in a center of the substrate. The semiconductor packages may also include a bushing around the hole to the first side of the substrate. The semiconductor packages may also include a plurality of pin holders arranged and coupled on the substrate. The semiconductor package may also include a molding compound at least partially encapsulating the substrate, encapsulating a side surface of the bushing, and encapsulating a plurality of side surfaces of the plurality of pin holders.
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公开(公告)号:US20190103337A1
公开(公告)日:2019-04-04
申请号:US16205995
申请日:2018-11-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , Soon Wei WANG , Hoe Kit Liew How Kat LEY
IPC: H01L23/433 , H01L23/00 , H01L23/498 , H01L23/495
Abstract: Implementations of semiconductor packages may include a die including a first side and a second side opposing the first side, the second side of the die coupled to a layer, a first end of a plurality of wires each bonded to the first side of the die, a mold compound encapsulating the die and the plurality of wires, and a second end of the plurality of wires each directly bonded to one of a plurality of bumps, wherein a surface of the layer is exposed through the mold compound.
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公开(公告)号:US20150189772A1
公开(公告)日:2015-07-02
申请号:US14568188
申请日:2014-12-12
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , Chee Hiong CHEW , Yushuang YAO
IPC: H05K5/02 , H01L23/053 , H01L23/40 , H01L23/32
CPC classification number: H05K5/0213 , H01L23/053 , H01L23/40 , H01L23/4006 , H01L23/4093 , H01L2924/0002 , H05K5/0221 , Y10T29/41 , H01L2924/00
Abstract: In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package.
Abstract translation: 在一个实施例中,半导体封装可以形成为具有与第一侧基本相反的第一侧和第二侧。 实施例可以包括形成在第一和第二侧面之间基本上横向延伸的附接夹,其中附接夹定位在第一和第二侧的远端附近。 一个实施例还可以包括形成附接夹以具有可弯曲远离主体部分的平面朝向半导体封装的底侧的柔性主要部分。
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公开(公告)号:US20240203845A1
公开(公告)日:2024-06-20
申请号:US18592704
申请日:2024-03-01
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Chee Hiong CHEW , Atapol PRAJUCKAMOL , Stephen ST. GERMAIN , Yusheng LIN
IPC: H01L23/495 , H01L23/00 , H01L23/367 , H01L23/40 , H01L25/065
CPC classification number: H01L23/49575 , H01L23/367 , H01L23/4093 , H01L23/49568 , H01L23/49582 , H01L24/80 , H01L25/0657
Abstract: Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
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公开(公告)号:US20240162197A1
公开(公告)日:2024-05-16
申请号:US18508551
申请日:2023-11-14
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , Chee Hiong CHEW
IPC: H01L25/07 , H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L25/072 , H01L23/3114 , H01L23/49844 , H01L24/40 , H01L24/48 , H01L24/73 , H01L2224/40175 , H01L2224/48137 , H01L2224/48175 , H01L2224/73221 , H01L2924/13091
Abstract: In a general aspect, a power module package includes a substrate that has a ceramic layer with a first primary surface and a second primary surface opposite the first primary surface. The substrate also includes a patterned metal layer disposed on the first primary surface. The package also includes a first plurality of semiconductor die disposed on a first portion of the patterned metal layer. The first plurality of semiconductor die are linearly arranged along a first axis. The package further includes a second plurality of semiconductor die disposed on a second portion of the patterned metal layer. The second plurality of semiconductor die are linearly arranged along a second axis parallel to the first axis.
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公开(公告)号:US20240128240A1
公开(公告)日:2024-04-18
申请号:US18398589
申请日:2023-12-28
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Chee Hiong CHEW , Atapol PRAJUCKAMOL , Stephen ST. GERMAIN , Yusheng LIN
IPC: H01L25/07 , H01L23/00 , H01L23/367 , H01L25/00
CPC classification number: H01L25/071 , H01L23/367 , H01L24/32 , H01L25/50 , H01L2224/32245
Abstract: Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.
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公开(公告)号:US20220415858A1
公开(公告)日:2022-12-29
申请号:US17823164
申请日:2022-08-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Chee Hiong CHEW , Atapol PRAJUCKAMOL , Stephen ST. GERMAIN , Yusheng LIN
IPC: H01L25/07 , H01L25/00 , H01L23/367 , H01L23/00
Abstract: Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.
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公开(公告)号:US20220415857A1
公开(公告)日:2022-12-29
申请号:US17823149
申请日:2022-08-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Chee Hiong CHEW , Atapol PRAJUCKAMOL , Stephen ST. GERMAIN , Yusheng LIN
IPC: H01L25/07 , H01L25/00 , H01L23/367 , H01L23/00
Abstract: Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.
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公开(公告)号:US20210090975A1
公开(公告)日:2021-03-25
申请号:US17247200
申请日:2020-12-03
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , Chee Hiong CHEW , Yushuang YAO
IPC: H01L23/495 , H01L23/00
Abstract: A semiconductor package assembly having a connecting clip disposed on both a first material stack and a second material stack having different thicknesses and disposed on a conducting substrate. This connecting clip has a first portion disposed on to the first material stack and second portion disposed on the second material stack, such that the surfaces of the first portion and second portion opposite the conducting substrate are at the same perpendicular distance from the conducting substrate. For example, in some implementations, when the thickness of the second material stack is smaller than the thickness of the first material stack, the second portion of the connecting clip may include a vertical support disposed on the second material stack to equalize the heights of the surfaces of the first portion and second portion of the connecting clip.
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公开(公告)号:US20210035892A1
公开(公告)日:2021-02-04
申请号:US16733322
申请日:2020-01-03
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Chee Hiong CHEW , Atapol PRAJUCKAMOL , Stephen ST. GERMAIN , Yusheng LIN
IPC: H01L23/495 , H01L23/40 , H01L23/367 , H01L23/00 , H01L25/065
Abstract: Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
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