公开(公告)号：US09711349B2

公开(公告)日：2017-07-18

申请号：US14678134

申请日：2015-04-03

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Kazuya Hanaoka ,  Shinya Sasagawa

IPC分类号： H01L29/10 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L27/1156

CPC分类号： H01L21/02244 ,  H01L21/02107 ,  H01L21/02252 ,  H01L21/02323 ,  H01L21/02521 ,  H01L27/1156 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

摘要： In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.

公开(公告)号：US09698280B2

公开(公告)日：2017-07-04

申请号：US15062268

申请日：2016-03-07

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shinya Sasagawa ,  Motomu Kurata ,  Kazuya Hanaoka ,  Yoshiyuki Kobayashi ,  Daisuke Matsubayashi

IPC分类号： H01L29/78 ,  H01L29/786 ,  H01L29/04 ,  H01L29/24

摘要： A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.

公开(公告)号：US09590109B2

公开(公告)日：2017-03-07

申请号：US14462824

申请日：2014-08-19

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Hidekazu Miyairi ,  Kazuya Hanaoka ,  Suguru Hondo ,  Shunpei Yamazaki

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/785 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/66969 ,  H01L29/7854 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2029/42388

摘要： A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: forming a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor.

摘要翻译： 一种高速运转的半导体器件。 具有良好开关特性的半导体器件。 高度集成的半导体器件。 小型半导体器件。 半导体器件通过以下方式形成：在绝缘表面上形成包括开口的半导体膜; 在所述半导体膜和所述开口中形成导电膜，并且在所述半导体膜上除去所述导电膜以在所述开口中形成导电柱; 在导电柱和半导体膜上形成岛状掩模; 使用掩模蚀刻导电柱和半导体膜以形成第一电极和第一半导体; 在第一半导体的顶表面和侧表面上形成栅极绝缘膜; 以及形成与所述栅极绝缘膜的顶表面接触并且面对所述第一半导体的顶表面和侧表面的栅电极。

公开(公告)号：US09368607B2

公开(公告)日：2016-06-14

申请号：US14885545

申请日：2015-10-16

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Hideomi Suzawa ,  Kazuya Hanaoka

IPC分类号： H01L21/00 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.

公开(公告)号：US09337344B2

公开(公告)日：2016-05-10

申请号：US14272767

申请日：2014-05-08

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Kazuya Hanaoka

IPC分类号： H01L29/786 ,  H01L29/417 ,  H01L21/768 ,  H01L29/26 ,  H01L21/336 ,  H01L29/66 ,  H01L27/12 ,  H01L29/45

CPC分类号： H01L29/78606 ,  H01L27/124 ,  H01L29/045 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： To provide a semiconductor device having a structure with which the device can be easily manufactured even if the size is decreased and which can suppress a decrease in electrical characteristics caused by the decrease in the size, and a manufacturing method thereof. A source electrode layer and a drain electrode layer are formed on an upper surface of an oxide semiconductor layer. A side surface of the oxide semiconductor layer and a side surface of the source electrode layer are provided on the same surface and are electrically connected to a first wiring. Further, a side surface of the oxide semiconductor layer and a side surface of the drain electrode layer are provided on the same surface and are electrically connected to a second wiring.

摘要翻译： 为了提供具有即使尺寸减小也能够容易地制造该装置并且可以抑制由尺寸减小引起的电特性降低的结构的半导体器件及其制造方法。 源电极层和漏电极层形成在氧化物半导体层的上表面上。 氧化物半导体层的侧表面和源极电极层的侧表面设置在同一表面上并与第一布线电连接。 此外，氧化物半导体层的侧表面和漏电极层的侧表面设置在同一表面上并电连接到第二布线。

公开(公告)号：US09166060B2

公开(公告)日：2015-10-20

申请号：US14294638

申请日：2014-06-03

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Hideomi Suzawa ,  Kazuya Hanaoka

IPC分类号： H01L29/786

CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.

摘要翻译： 提供具有能够抑制其电特性劣化的结构的半导体器件，其在小型化时变得明显。 半导体器件包括绝缘表面上的第一氧化物半导体膜; 第一氧化物半导体膜上的第二氧化物半导体膜; 与第二氧化物半导体膜接触的源电极和漏电极; 第二氧化物半导体膜上的第三氧化物半导体膜，源电极和漏电极; 第三氧化物半导体膜上的栅极绝缘膜; 以及栅极绝缘膜上的栅电极。 栅电极和栅极绝缘膜之间的第一界面具有比第一氧化物半导体膜和第二氧化物半导体膜之间的第二界面更接近绝缘表面的区域。

公开(公告)号：US09136361B2

公开(公告)日：2015-09-15

申请号：US14656125

申请日：2015-03-12

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Sachiaki Tezuka ,  Atsuo Isobe ,  Takehisa Hatano ,  Kazuya Hanaoka

IPC分类号： H01L29/66 ,  H01L21/465 ,  H01L21/463

CPC分类号： H01L29/66969 ,  H01L21/463 ,  H01L21/465 ,  H01L29/41733 ,  H01L29/41783 ,  H01L29/7869

摘要： To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.

公开(公告)号：US20150214377A1

公开(公告)日：2015-07-30

申请号：US14601625

申请日：2015-01-21

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Daigo Ito ,  Kazuya Hanaoka

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78648 ,  H01L29/78696

摘要： A semiconductor device having favorable electric characteristics is provided. An oxide semiconductor layer includes first and second regions apart from each other, a third region which is between the first and second regions and overlaps with a gate electrode layer with a gate insulating film provided therebetween, a fourth region between the first and third regions, and a fifth region between the second and third regions. A source electrode layer includes first and second conductive layers. A drain electrode layer includes third and fourth conductive layers. The first conductive layer is formed only over the first region. The second conductive layer is in contact with an insulating layer, the first conductive layer, and the first region. The third conductive layer is formed only over the second region. The fourth conductive layer is in contact with the insulating layer, the third conductive layer, and the second region.

摘要翻译： 提供了具有良好的电特性的半导体器件。 氧化物半导体层包括彼此分开的第一和第二区域，位于第一和第二区域之间并与其间设置有栅极绝缘膜的栅电极层重叠的第三区域，第一和第三区域之间的第四区域， 以及第二和第三区域之间的第五区域。 源极电极层包括第一和第二导电层。 漏电极层包括第三和第四导电层。 第一导电层仅形成在第一区域上。 第二导电层与绝缘层，第一导电层和第一区域接触。 第三导电层仅形成在第二区域上。 第四导电层与绝缘层，第三导电层和第二区域接触。

公开(公告)号：US08999773B2

公开(公告)日：2015-04-07

申请号：US13854564

申请日：2013-04-01

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Kazuya Hanaoka ,  Shinya Sasagawa

IPC分类号： H01L21/00 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L27/115

CPC分类号： H01L21/02244 ,  H01L21/02107 ,  H01L21/02252 ,  H01L21/02323 ,  H01L21/02521 ,  H01L27/1156 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

摘要： In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.

摘要翻译： 在氧化物绝缘膜上设置有金属膜的叠层膜的处理方法中，通过施加功率密度大于等于0.59W / cm 2的高频电力产生含有氧离子的等离子体 在含有大于或等于5Pa且小于或等于15Pa的氧的气氛下，叠层层一侧的厚度为1.18W / cm 2以下，金属膜被氧离子氧化， 并且通过向氧化物绝缘膜供给氧而形成含有过量氧的氧化物绝缘膜。

公开(公告)号：US20150060844A1

公开(公告)日：2015-03-05

申请号：US14462824

申请日：2014-08-19

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Hidekazu Miyairi ,  Kazuya Hanaoka ,  Suguru Hondo ,  Shunpei Yamazaki

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/785 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/66969 ,  H01L29/7854 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2029/42388

摘要： A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: forming a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor.

摘要翻译： 一种高速运转的半导体器件。 具有良好开关特性的半导体器件。 高度集成的半导体器件。 小型半导体器件。 半导体器件通过以下方式形成：在绝缘表面上形成包括开口的半导体膜; 在所述半导体膜和所述开口中形成导电膜，并且在所述半导体膜上除去所述导电膜以在所述开口中形成导电柱; 在导电柱和半导体膜上形成岛状掩模; 使用掩模蚀刻导电柱和半导体膜以形成第一电极和第一半导体; 在第一半导体的顶表面和侧表面上形成栅极绝缘膜; 以及形成与所述栅极绝缘膜的顶表面接触并且面对所述第一半导体的顶表面和侧表面的栅电极。