公开(公告)号：US09276091B2

公开(公告)日：2016-03-01

申请号：US14688199

申请日：2015-04-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Suguru Hondo ,  Akihisa Shimomura ,  Masaki Koyama ,  Motomu Kurata ,  Kazuya Hanaoka ,  Sho Nagamatsu ,  Kosei Nei ,  Toru Hasegawa

IPC: H01L21/46 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/46 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.

Abstract translation: 提供具有稳定电特性的包括氧化物半导体膜的晶体管。 还提供了具有优异的导通状态特性的包括氧化物半导体膜的晶体管。 其中形成具有低电阻的氧化物半导体膜并且氧化物半导体膜的沟道区的电阻增加的半导体器件。 注意，氧化物半导体膜经受用于降低电阻以降低电阻的工艺。 用于降低氧化物半导体膜的电阻的方法可以是例如在高于或等于450℃且低于或等于740℃的温度下的激光处理或热处理。 例如，可以通过等离子体氧化或氧离子的注入来提高具有低电阻的氧化物半导体膜的沟道区域的电阻的方法。

公开(公告)号：US20150028330A1

公开(公告)日：2015-01-29

申请号：US14337835

申请日：2014-07-22

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Shinya Sasagawa ,  Suguru Hondo ,  Hideomi Suzawa

IPC: H01L29/786 ,  H01L21/465 ,  H01L21/02 ,  H01L21/44 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L29/78693 ,  H01L21/02565 ,  H01L21/467 ,  H01L27/1225 ,  H01L29/247 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with each side surface of the first oxide semiconductor film and the second oxide semiconductor film; a first insulating film and a second insulating film over the source electrode and the drain electrode; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with an upper surface of the gate insulating film and facing an upper surface and the side surface of the second oxide semiconductor film.

Abstract translation: 提供了可以抑制随着小型化而变得更加显着的电特性劣化的半导体器件。 半导体器件包括绝缘表面上的第一氧化物半导体膜; 第一氧化物半导体膜上的第二氧化物半导体膜; 与所述第一氧化物半导体膜和所述第二氧化物半导体膜的各侧面接触的源电极和漏电极; 源电极和漏电极上的第一绝缘膜和第二绝缘膜; 第二氧化物半导体膜上的第三氧化物半导体膜，源电极和漏电极; 第三氧化物半导体膜上的栅极绝缘膜; 以及与栅极绝缘膜的上表面接触并面对第二氧化物半导体膜的上表面和侧表面的栅电极。

公开(公告)号：US09166021B2

公开(公告)日：2015-10-20

申请号：US14047639

申请日：2013-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8238 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

Abstract translation: 为包括氧化物半导体的小型半导体器件提供稳定的电特性和高可靠性，并且制造半导体器件。 半导体器件包括基极绝缘层; 氧化物堆叠，其在所述基底绝缘层上方并且包括氧化物半导体层; 氧化层上的源电极层和漏电极层; 氧化层上的栅极绝缘层，源电极层和漏电极层; 栅绝缘层上的栅电极层; 以及在栅电极层上的层间绝缘层。 在半导体器件中，氧化物半导体层中的缺陷密度降低。

公开(公告)号：US20140361291A1

公开(公告)日：2014-12-11

申请号：US14293115

申请日：2014-06-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shinya Sasagawa ,  Motomu Kurata ,  Kazuya Hanaoka ,  Suguru Hondo

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78609

Abstract: A semiconductor device using oxide semiconductor with favorable electrical characteristics, or a highly reliable semiconductor device is provided. A semiconductor device is manufactured by: forming an oxide semiconductor layer over an insulating surface; forming source and drain electrodes over the oxide semiconductor layer; forming an insulating film and a conductive film in this order over the oxide semiconductor layer and the source and drain electrodes; etching part of the conductive film and insulating film to form a gate electrode and a gate insulating layer, and etching part of the upper portions of the source and drain electrodes to form a first covering layer containing a constituent element of the source and drain electrodes and in contact with the side surface of the gate insulating layer; oxidizing the first covering layer to form a second covering layer; and forming a protective insulating layer containing an oxide over the second covering layer.

Abstract translation: 提供了使用具有良好电气特性的氧化物半导体的半导体器件或高度可靠的半导体器件。 半导体器件通过以下方式制造：在绝缘表面上形成氧化物半导体层; 在所述氧化物半导体层上形成源极和漏极; 在氧化物半导体层和源电极和漏电极上依次形成绝缘膜和导电膜; 蚀刻导电膜和绝缘膜的一部分以形成栅极电极和栅极绝缘层，并且蚀刻源极和漏极的上部的一部分以形成包含源极和漏极的构成元素的第一覆盖层，以及 与栅极绝缘层的侧表面接触; 氧化第一覆盖层以形成第二覆盖层; 以及在所述第二覆盖层上形成包含氧化物的保护绝缘层。

公开(公告)号：US09773915B2

公开(公告)日：2017-09-26

申请号：US14293115

申请日：2014-06-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shinya Sasagawa ,  Motomu Kurata ,  Kazuya Hanaoka ,  Suguru Hondo

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78609

Abstract: A semiconductor device using oxide semiconductor with favorable electrical characteristics, or a highly reliable semiconductor device is provided. A semiconductor device is manufactured by: forming an oxide semiconductor layer over an insulating surface; forming source and drain electrodes over the oxide semiconductor layer; forming an insulating film and a conductive film in this order over the oxide semiconductor layer and the source and drain electrodes; etching part of the conductive film and insulating film to form a gate electrode and a gate insulating layer, and etching part of the upper portions of the source and drain electrodes to form a first covering layer containing a constituent element of the source and drain electrodes and in contact with the side surface of the gate insulating layer; oxidizing the first covering layer to form a second covering layer; and forming a protective insulating layer containing an oxide over the second covering layer.

公开(公告)号：US09660098B2

公开(公告)日：2017-05-23

申请号：US14883732

申请日：2015-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

公开(公告)号：US20140106502A1

公开(公告)日：2014-04-17

申请号：US14047639

申请日：2013-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

Abstract translation: 为包括氧化物半导体的小型半导体器件提供稳定的电特性和高可靠性，并且制造半导体器件。 半导体器件包括基极绝缘层; 氧化物堆叠，其在所述基底绝缘层上方并且包括氧化物半导体层; 氧化层上的源电极层和漏电极层; 氧化层上的栅极绝缘层，源电极层和漏电极层; 栅绝缘层上的栅电极层; 以及在栅电极层上的层间绝缘层。 在半导体器件中，氧化物半导体层中的缺陷密度降低。

公开(公告)号：US09761736B2

公开(公告)日：2017-09-12

申请号：US14337835

申请日：2014-07-22

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Shinya Sasagawa ,  Suguru Hondo ,  Hideomi Suzawa

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/24 ,  H01L29/423 ,  H01L27/12 ,  H01L21/467 ,  H01L21/02

CPC classification number: H01L29/78693 ,  H01L21/02565 ,  H01L21/467 ,  H01L27/1225 ,  H01L29/247 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with each side surface of the first oxide semiconductor film and the second oxide semiconductor film; a first insulating film and a second insulating film over the source electrode and the drain electrode; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with an upper surface of the gate insulating film and facing an upper surface and the side surface of the second oxide semiconductor film.

公开(公告)号：US09590109B2

公开(公告)日：2017-03-07

申请号：US14462824

申请日：2014-08-19

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hidekazu Miyairi ,  Kazuya Hanaoka ,  Suguru Hondo ,  Shunpei Yamazaki

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L29/785 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/66969 ,  H01L29/7854 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: forming a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor.

Abstract translation: 一种高速运转的半导体器件。 具有良好开关特性的半导体器件。 高度集成的半导体器件。 小型半导体器件。 半导体器件通过以下方式形成：在绝缘表面上形成包括开口的半导体膜; 在所述半导体膜和所述开口中形成导电膜，并且在所述半导体膜上除去所述导电膜以在所述开口中形成导电柱; 在导电柱和半导体膜上形成岛状掩模; 使用掩模蚀刻导电柱和半导体膜以形成第一电极和第一半导体; 在第一半导体的顶表面和侧表面上形成栅极绝缘膜; 以及形成与所述栅极绝缘膜的顶表面接触并且面对所述第一半导体的顶表面和侧表面的栅电极。

公开(公告)号：US09293599B2

公开(公告)日：2016-03-22

申请号：US14278705

申请日：2014-05-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Suguru Hondo ,  Daigo Ito

IPC: H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L23/31 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L23/3192 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78609 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A transistor with stable electric characteristics is provided. A transistor with small variation in electrical characteristics is provided. A miniaturized transistor is provided. A transistor having low off-state current is provided. A transistor having high on-state current is provided. A semiconductor device including the transistor is provided. One embodiment of the present invention is a semiconductor device including an island-shaped stack including a base insulating film and an oxide semiconductor film over the base insulating film; a protective insulating film facing a side surface of the stack and not facing a top surface of the stack; a first conductive film and a second conductive film which are provided over and in contact with the stack to be apart from each other; an insulating film over the stack, the first conductive film, and the second conductive film; and a third conductive film over the insulating film.

Abstract translation: 提供具有稳定电特性的晶体管。 提供了一种电特性变化小的晶体管。 提供了一种小型化的晶体管。 提供具有低截止电流的晶体管。 提供具有高导通电流的晶体管。 提供包括晶体管的半导体器件。 本发明的一个实施例是一种半导体器件，其包括在基底绝缘膜上的包括基底绝缘膜和氧化物半导体膜的岛状叠层; 面向堆叠的侧表面并且不面向堆叠的顶表面的保护性绝缘膜; 第一导电膜和第二导电膜，其设置在堆叠之间并与堆叠接触以彼此分开; 叠层上的绝缘膜，第一导电膜和第二导电膜; 和绝缘膜上的第三导电膜。