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    Semiconductor device and a method of manufacturing the semiconductor device
    21.
    发明授权
    Semiconductor device and a method of manufacturing the semiconductor device 有权

    公开(公告)号：US12243754B2

    公开(公告)日：2025-03-04

    申请号：US17517304

    申请日：2021-11-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Do Young Choi ,  Sung Min Kim ,  Cheol Kim ,  Hyo Jin Kim ,  Dae Won Ha ,  Dong Woo Han

    IPC: H01L21/3213 ,  H01L21/308 ,  H01L27/088 ,  H01L27/092

    Abstract: Provided is a semiconductor device. The semiconductor device comprises a first active pattern extending in a first direction on a substrate, a second active pattern which extends in the first direction and is adjacent to the first active pattern in a second direction different from the first direction, a field insulating film placed between the first active pattern and the second active pattern, a first gate structure which crosses the first active pattern, extends in the second direction, and includes a first gate electrode and a first gate spacer, a second gate structure which crosses the second active pattern, extends in the second direction, and includes a second gate electrode and a second gate spacer, a gate separation structure placed on the field insulating film between the first gate structure and the second gate structure.

    Semiconductor device
    23.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11387345B2

    公开(公告)日：2022-07-12

    申请号：US17176226

    申请日：2021-02-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Guk Il An ,  Keun Hwi Cho ,  Dae Won Ha ,  Seung Seok Ha

    IPC: H01L29/51 ,  H01L23/522 ,  H01L27/088 ,  H01L29/78 ,  H01L49/02

    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.

    Semiconductor device including contact structure
    24.
    发明授权
    Semiconductor device including contact structure 有权

    公开(公告)号：US11094593B2

    公开(公告)日：2021-08-17

    申请号：US16169326

    申请日：2018-10-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hwi Chan Jun ,  Chang Hwa Kim ,  Dae Won Ha

    IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L23/522 ,  H01L21/8238

    Abstract: A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.

    Semiconductor device
    26.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10916545B2

    公开(公告)日：2021-02-09

    申请号：US16354369

    申请日：2019-03-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyo Jin Kim ,  Dae Won Ha ,  Yoon Moon Park ,  Keun Hwi Cho

    IPC: H01L27/092

    Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor including a single first active fin disposed in the first region, a first gate electrode intersecting the single first active fin, and a single first source/drain layer disposed in the first recess of the single first active fin, and a second transistor including a plurality of second active fins disposed in the second region, a second gate electrode intersecting the plurality of second active fins, and a plurality of second source/drain layers disposed in the second recesses of the plurality of second active fins. The single first active fin and the plurality of second active fins may have a first conductivity type, and a depth of the first recess may be less than a depth of each of the second recesses.

    Semiconductor device
    27.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10916534B2

    公开(公告)日：2021-02-09

    申请号：US16395691

    申请日：2019-04-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seung Seok Ha ,  Kyoung-Mi Park ,  Hyun-Seung Song ,  Keon Yong Cheon ,  Dae Won Ha

    IPC: H01L27/02 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06

    Abstract: A semiconductor device includes a first fin pattern and a second fin pattern in a NMOS region, each extending lengthwise along a first direction and separated by a first trench and a third fin pattern and a fourth fin pattern in a PMOS region, each extending lengthwise along the first direction in parallel with respective ones of the first fin pattern and the second fin pattern and separated by a second trench. First and second isolation layers are disposed in the first and second trenches, respectively. A first gate electrode extends lengthwise along a second direction transverse to the first direction and crosses the first fin pattern. A second gate electrode extends lengthwise along the second direction and crosses the second fin pattern. Spaced apart third and fourth gate electrodes extend lengthwise along the second direction on the second isolation layer.

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