公开(公告)号：US20240421082A1

公开(公告)日：2024-12-19

申请号：US18662042

申请日：2024-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeon Won Jeong ,  Yubo Qian ,  Sutae Kim ,  Jae Young Park ,  Jin Woo Lee

IPC: H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a substrate including a standard cell area and an ending cell area that at least partially surrounds the standard cell area; a first active pattern in the standard cell area; a first wiring that extends in a first direction and is on the first active pattern; a first gate electrode that extends in a second direction and is on the first active pattern; a first gate contact; a second active pattern in the ending cell area; a second wiring that extends in the first direction and is on the second active pattern; a second gate electrode that extends in the second direction and is on the second active pattern; and a second gate contact.

公开(公告)号：US11830911B2

公开(公告)日：2023-11-28

申请号：US18162892

申请日：2023-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L29/417 ,  H10B10/00

CPC classification number: H01L29/0649 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/41791 ,  H10B10/12 ,  H10B10/18

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10529801B2

公开(公告)日：2020-01-07

申请号：US15933827

申请日：2018-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/11

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10056491B2

公开(公告)日：2018-08-21

申请号：US15420512

申请日：2017-01-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Hoon Jeong ,  Hong Bum Park ,  HanMei Choi ,  Jae Young Park ,  Seung Hyun Lim

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/51 ,  H01L29/66 ,  H01L29/41 ,  H01L27/08 ,  H01L27/10 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423

CPC classification number: H01L29/7854 ,  H01L21/28158 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/0886 ,  H01L29/0657 ,  H01L29/408 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/66818 ,  H01L29/7851 ,  H01L29/7853

Abstract: A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.

公开(公告)号：US20230178595A1

公开(公告)日：2023-06-08

申请号：US18162892

申请日：2023-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L27/0886 ,  H01L21/823431 ,  H01L21/76224 ,  H01L21/823481 ,  H01L29/41791

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10964782B2

公开(公告)日：2021-03-30

申请号：US16715075

申请日：2019-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/11 ,  H01L29/417

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US20190096993A1

公开(公告)日：2019-03-28

申请号：US15933827

申请日：2018-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US12261200B2

公开(公告)日：2025-03-25

申请号：US18488381

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H10B10/00

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US11575002B2

公开(公告)日：2023-02-07

申请号：US17212847

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/11 ,  H01L29/417

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10153170B2

公开(公告)日：2018-12-11

申请号：US15416574

申请日：2017-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwa Jin Jang ,  Jae Young Park ,  Sun Young Lee ,  Ha Kyu Seong ,  Han Mei Choi

IPC: H01L21/3065 ,  H01L21/84 ,  H01L21/263 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a first fin structure which includes first semiconductor patterns and second semiconductor patterns stacked alternately on a substrate and extends in a first direction, forming an exposed first wire pattern group which includes the second semiconductor patterns by removing the first semiconductor patterns, heat-treating the exposed first wire pattern group, and forming a first gate electrode which surrounds the first wire pattern group and extends in a second direction different from the first direction.