公开(公告)号：US11450761B2

公开(公告)日：2022-09-20

申请号：US16857621

申请日：2020-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil Kang ,  Dongwon Kim ,  Minyi Kim ,  Keun Hwi Cho

IPC: H01L29/66 ,  H01L29/732 ,  H01L29/735 ,  H01L21/8228 ,  H01L21/8238 ,  H01L29/06

Abstract: A semiconductor device including a well region in a substrate, an impurity region in the well region, a first active fin on the impurity region, a second active fin on the well region, and a connection pattern penetrating the second active fin and connected to the well region may be provided. The substrate and the impurity region include impurities having a first conductivity type. The well region includes impurities having a second conductivity type different from the first conductivity type. The first active fin includes a plurality of first semiconductor patterns that are spaced apart from each other in a direction perpendicular to a top surface of the substrate. The first semiconductor patterns and the impurity region include impurities having the first conductivity type.

公开(公告)号：US20220199798A1

公开(公告)日：2022-06-23

申请号：US17457661

申请日：2021-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Gil Kang ,  Keun Hwi Cho ,  Sangdeok Kwon ,  Dongwon Kim ,  Hyun-Seung Song

IPC: H01L29/423 ,  H01L23/522 ,  H01L27/088 ,  H01L29/786

Abstract: A semiconductor device includes a substrate that includes a peripheral region, a first active pattern on the peripheral region, a first source/drain pattern on the first active pattern, a first channel pattern formed on the first active pattern and connected to the first source/drain pattern, wherein the first channel pattern includes semiconductor patterns that are stacked and spaced apart from each other, a first gate electrode that extends in a first direction and crosses the first channel pattern, a gate insulating layer interposed between the first gate electrode and the first channel pattern, a first gate contact disposed on the first gate electrode and that extends in the first direction, and a first dielectric layer interposed between the first gate electrode and the first gate contact. The first dielectric layer is interposed between the first gate contact and the first gate electrode and extends in the first direction.

公开(公告)号：US11107815B2

公开(公告)日：2021-08-31

申请号：US16905027

申请日：2020-06-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungmin Kim ,  Dongwon Kim

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/66

Abstract: A semiconductor device includes: channel patterns disposed on a substrate; a pair of source/drain patterns disposed at first and second sides of each of the channel patterns; and a gate electrode disposed around the channel patterns, wherein the gate electrode includes a first recessed top surface between adjacent channel patterns, wherein the channel patterns are spaced apart from the substrate, and wherein the gate electrode is disposed between the substrate and the channel patterns.

公开(公告)号：US10969779B2

公开(公告)日：2021-04-06

申请号：US15908558

申请日：2018-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoon Choi ,  Sung-Dae Cho ,  Nara Cho ,  Dongwon Kim ,  Dongjin Park ,  Sang-Min Shin

IPC: G05D1/00 ,  B60R25/24 ,  G08C17/02

Abstract: Various embodiments of the present disclosure relate to an apparatus and a method for communicating with another electronic device in an electronic device. The electronic device includes: a first communication module configured to support low frequency communication; a second communication module configured to support cellular communication; at least one sensor; at least one processor; and a memory electrically connected with the processor, wherein, when being executed, the memory may store instructions that cause the at least one processor to detect a motion of the electronic device based on the at least one sensor, and to transmit a signal for controlling an activation state regarding the low-frequency communication with another electronic device to the another electronic device via the second communication module, based on motion information of the electronic device. Other embodiments are possible.

公开(公告)号：US10741564B2

公开(公告)日：2020-08-11

申请号：US15255652

申请日：2016-09-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghun Lee ,  TaeYong Kwon ,  Dongwon Kim

IPC: H01L27/11 ,  H01L27/11582 ,  H01L27/092 ,  H01L29/417

Abstract: An SRAM device includes first, second and third transistors, which are used as a pass gate transistor, a pull-down transistor, and a pull-up transistor, respectively. A channel region of each transistor may include a plurality of semiconductor sheets that are vertically stacked on a substrate. The semiconductor sheets used as the channel regions of the first and second transistors may have a width greater than the semiconductor sheets used as channel regions of the third transistor.

公开(公告)号：US20240322012A1

公开(公告)日：2024-09-26

申请号：US18602274

申请日：2024-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byeonghee Son ,  Myunggil Kang ,  Dongwon Kim ,  Jongsu Kim ,  Changwoo Noh ,  Beomjin Park

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/66553 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device including an active region extending in a first horizontal direction, a nanosheet stack apart from the active region, a plurality of gate structures extending in a second horizontal direction and including a plurality of gate electrodes, a plurality of source/drain regions arranged on sidewalls of the gate structures, and a device isolation layer extending in a vertical direction, wherein the plurality of gate structures include a first gate structure in which a source/drain region is arranged on one sidewall and the device isolation layer is arranged on the other sidewall, and a second gate structure in which source/drain regions are arranged on both sidewalls, wherein the plurality of gate electrodes of the first gate structure include a main gate electrode positioned at the uppermost end and a plurality of sub-gate electrodes, and an internal spacer is between the device isolation layer and the plurality of sub-gate electrodes.

公开(公告)号：US20240321956A1

公开(公告)日：2024-09-26

申请号：US18614804

申请日：2024-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woosuk Choi ,  Beomjin Park ,  Myunggil Kang ,  Dongwon Kim ,  Hyumin Yoo ,  Soojin Jeong

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0665 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/78696

Abstract: An integrated circuit device includes a fin-type active region that protrudes from a substrate and extends in a first horizontal direction, a plurality of nanosheets disposed on the fin-type active region and separated from each other in the vertical direction, a gate line that extends in a second horizontal direction and that surrounds the plurality of nanosheets on the fin-type active region, and includes respective sub-gate portions between the plurality of nanosheets and a main gate portion above the uppermost layer of the plurality of nanosheets, a source/drain region disposed on the fin-type active region, adjacent to the gate line, and connected to the plurality of nanosheets, and a plurality of inner spacers interposed between the gate line and the source/drain region. The shapes of first inner spacers that face the sub-gate portions differ from the shape of a second inner spacer that faces the main gate portion.

公开(公告)号：US12012686B2

公开(公告)日：2024-06-18

申请号：US17712396

申请日：2022-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changwoo Lee ,  Dongwon Kim ,  Jiwoong Kim

IPC: D06F34/34 ,  D06F29/00

CPC classification number: D06F34/34 ,  D06F29/005

Abstract: A washing machine including a cabinet, a tub disposed in the cabinet, a drum rotatably disposed in the tub, and a control device detachably mounted on the cabinet. The control device includes a control frame detachably mounted on a front surface of the cabinet, a control panel detachably mounted on the control frame and a control module interposed between the control frame and the control panel. The control panel configured to be movable between a first position where the control panel is detachable from the control frame and a second position where a forward and backward movement with reference to the control frame is limited.

公开(公告)号：US20240079466A1

公开(公告)日：2024-03-07

申请号：US18136975

申请日：2023-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangwon Baek ,  Beomjin Park ,  Myung Gil Kang ,  Dongwon Kim ,  Hyumin Yoo ,  Namkyu Cho

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/42392 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of semiconductor patterns spaced apart from each other, a source/drain pattern connected to the plurality of semiconductor patterns, a gate electrode including, an inner electrode between a first semiconductor pattern of the plurality of semiconductor patterns and a second semiconductor pattern of the plurality of semiconductor patterns, the first semiconductor pattern and the second semiconductor pattern being adjacent to each other, and an outer electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns.

公开(公告)号：US20230080400A1

公开(公告)日：2023-03-16

申请号：US18051034

申请日：2022-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： KEUN HWI CHO ,  Soonmoon Jung ,  Dongwon Kim ,  Myung Gil Kang

IPC: H01L29/423 ,  H01L27/092 ,  H01L29/417 ,  H01L23/528

Abstract: Semiconductor devices and methods of forming the same are disclosed. The semiconductor devices may include a substrate including a first region and a second region, which are spaced apart from each other with a device isolation layer interposed therebetween, a first gate electrode and a second gate electrode on the first and second regions, respectively, an insulating separation pattern separating the first gate electrode and the second gate electrode from each other and extending in a second direction that traverses the first direction, a connection structure electrically connecting the first gate electrode to the second gate electrode, and a first signal line electrically connected to the connection structure. The first and second gate electrodes are extended in a first direction and are aligned to each other in the first direction. The first signal line may extend in the second direction and may vertically overlap the insulating separation pattern.