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公开(公告)号：US20200066791A1
公开(公告)日：2020-02-27
申请号：US16669071
申请日：2019-10-30
Inventor： Guohan Hu , Younghyun Kim , Jeong-Heon Park , Daniel Worledge
Abstract: A double magnetic tunnel junction includes a bottom reference layer having a first fixed magnetization and a first thickness and formed from at least one material. A first tunnel barrier is on the bottom reference layer. A free layer is on the first tunnel barrier and has a changeable magnetization. A second tunnel barrier is on the free layer. A multilayered top reference layer is formed on the second tunnel barrier having a second fixed magnetization that is opposite to the first fixed magnetization and a second thickness that is smaller than the first thickness, and equal to or greater than the third thickness.
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公开(公告)号：US20190123263A1
公开(公告)日：2019-04-25
申请号：US16108192
申请日：2018-08-22
Applicant: Samsung Electronics Co, Ltd.
Inventor： Yong-Sung PARK , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US20170338404A1
公开(公告)日：2017-11-23
申请号：US15157834
申请日：2016-05-18
Inventor： Guohan Hu , Kwangseok Kim , Younghyun Kim , Jung-Hyuk Lee , Jeong-Heon Park
Abstract: A method for manufacturing a semiconductor device includes forming a magnetic tunnel junction (MTJ) structure comprising a magnetic fixed layer, a non-magnetic barrier layer and a magnetic free layer, and forming a metal oxide cap layer on the MTJ structure, wherein forming the metal oxide cap layer comprises depositing a metal layer on the magnetic free layer, performing an oxidation of the deposited metal layer to form an oxidized metal layer, and depositing a metal oxide layer on the oxidized metal layer.
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公开(公告)号：US20170294575A1
公开(公告)日：2017-10-12
申请号：US15094052
申请日：2016-04-08
Inventor： Guohan Hu , Junghyuk Lee , Jeong-Heon Park
CPC classification number: H01L43/10 , G11C11/161 , H01L43/08 , H01L43/12
Abstract: Techniques relate to forming a semiconductor device. A magnetic pinned layer is formed adjacent to a tunnel barrier layer. A magnetic free layer is formed adjacent to the tunnel barrier layer, such that the tunnel barrier layer is sandwiched between the magnetic pinned layer and the magnetic free layer. The magnetic free layer includes a first magnetic layer, a second magnetic layer disposed on top of the first magnetic layer, and a third magnetic layer disposed on top of the second magnetic layer. The second magnetic layer of the magnetic free layer includes an additional material, and the additional material is a selection of at least one of Be, Mg, Al, Ca, B, C, Si, V, Cr, Ti, and Mn.
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25.发明授权Low degradation MRAM encapsulation process using silicon-rich silicon nitride film 有权使用富硅氮化硅薄膜的低降解MRAM封装工艺公开(公告)号：US09515252B1
公开(公告)日：2016-12-06
申请号：US14983015
申请日：2015-12-29
Inventor： Anthony J. Annunziata , Chandrasekaran Kothandaraman , Gen P. Lauer , JungHyuk Lee , Nathan P. Marchack , Deborah A. Neumayer , Eugene J. O'Sullivan , Jeong-Heon Park
CPC classification number: H01L43/08 , G11C11/161 , G11C11/1677 , H01L27/22 , H01L27/222 , H01L43/02 , H01L43/12
Abstract: A method of making a magnetic random access memory (MRAM) device comprising forming a magnetic tunnel junction on an electrode, the magnetic tunnel junction comprising a first reference layer, a free layer, and a first tunnel barrier layer; and depositing an encapsulating silicon nitride film on and along sidewalls of the magnetic tunnel junction; wherein the silicon nitride film has a N:Si ratio from 0.1 to 1. An MRAM device made by the above method is also disclosed.
Abstract translation: 一种制造磁性随机存取存储器（MRAM）装置的方法，包括在电极上形成磁性隧道结，所述磁性隧道结包括第一参考层，自由层和第一隧道势垒层; 以及在所述磁性隧道结的侧壁上并沿着所述磁性隧道结的侧壁沉积封装的氮化硅膜; 其中氮化硅膜具有0.1:1的N:Si比率。还公开了通过上述方法制造的MRAM器件。
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Patent Agency Ranking
公开(公告)号：US12245518B2
公开(公告)日：2025-03-04
申请号：US17490353
申请日：2021-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ung Hwan Pi , Seonggeon Park , Jeong-Heon Park , Sung Chul Lee
Abstract: A magnetic memory device includes a first magnetic layer extending in a first direction, a pinned layer on the first magnetic layer, and a second magnetic layer vertically overlapping with the pinned layer with the first magnetic layer interposed between the pinned layer and the second magnetic layer. The first magnetic layer includes, a plurality of magnetic domains arranged in the first direction, and at least one magnetic domain wall between the plurality of magnetic domains, and a magnetization direction of the second magnetic layer is substantially parallel to a top surface of the first magnetic layer.
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公开(公告)号：US11535930B2
公开(公告)日：2022-12-27
申请号：US16856539
申请日：2020-04-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Joonmyoung Lee , Whankyun Kim , Eunsun Noh , Jeong-Heon Park , Junho Jeong
Abstract: A sputtering apparatus including a chamber, a gas supply configured to supply the chamber with a first gas and a second inert gas, the first inert gas and the second inert gas having a first evaporation point and second evaporation point, respectively, a plurality of sputter guns in an upper portion of the chamber, a chuck in a lower portion of the chamber and facing the sputter guns, the chuck configured to accommodate a substrate thereon, and a cooling unit connected to a lower portion of the chuck, the cooling unit configured to cool the chuck to a temperature less than the first evaporation point and greater than the second evaporation point, and a method of fabricating a magnetic memory device may be provided.
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28.发明授权公开(公告)号：US10510391B2
公开(公告)日：2019-12-17
申请号：US15802838
申请日：2017-11-03
Inventor： Guohan Hu , Jeong-Heon Park , Daniel C. Worledge
Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.
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公开(公告)号：US10388859B2
公开(公告)日：2019-08-20
申请号：US15856256
申请日：2017-12-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dae-Shik Kim , Jeong-Heon Park , Gwan-Hyeob Koh
Abstract: In a method of manufacturing an MRAM device, first and second lower electrodes may be formed on first and second regions, respectively, of a substrate. First and second MTJ structures having different switching current densities from each other may be formed on the first and second lower electrodes, respectively. First and second upper electrodes may be formed on the first and second MTJ structures, respectively.
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公开(公告)号：US20190140165A1
公开(公告)日：2019-05-09
申请号：US16242555
申请日：2019-01-08
Inventor： Guohan Hu , Younghyun Kim , Chandrasekara Kothandaraman , Jeong-Heon Park
CPC classification number: H01L43/08 , H01L27/226 , H01L43/02 , H01L43/10 , H01L43/12
Abstract: Memory devices and methods of forming the same include forming a memory stack over a bottom electrode. The memory stack has a free magnetic layer formed on the tunnel barrier layer. A first boron-segregating layer is formed directly on the free magnetic layer. An anneal is performed to cause boron to leave the free magnetic layer at an interface with the first boron-segregating layer. A top electrode is formed over the memory stack.
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