公开(公告)号：US20160087085A1

公开(公告)日：2016-03-24

申请号：US14854789

申请日：2015-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Sachiaki TEZUKA ,  Mitsuhiro ICHIJO ,  Noriyoshi SUZUKI

IPC: H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/06 ,  H01L21/16 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a semiconductor device with improved reliability. To provide a semiconductor device with stable characteristics. To provide a transistor having a low off-state current. To provide a transistor having a high on-state current. To provide a novel semiconductor device, a novel electronic device, or the like. A method for manufacturing the semiconductor device includes the steps of forming a first semiconductor over a substrate; forming a second semiconductor over and in contact with the first semiconductor; forming a first layer over the second semiconductor; performing oxygen plasma treatment and then removing the first layer to expose at least part of a surface of the second semiconductor; forming a third semiconductor over and in contact with the second semiconductor; forming a first insulator over and in contact with the third semiconductor; and forming a first conductor over the first insulator.

Abstract translation: 提供具有改善的可靠性的半导体器件。 提供具有稳定特性的半导体器件。 提供具有低截止电流的晶体管。 提供具有高导通电流的晶体管。 提供新颖的半导体器件，新颖的电子器件等。 一种制造半导体器件的方法包括以下步骤：在衬底上形成第一半导体; 在第一半导体之上形成第二半导体，并与第一半导体接触; 在所述第二半导体上形成第一层; 执行氧等离子体处理，然后去除第一层以暴露第二半导体的表面的至少一部分; 在所述第二半导体上形成第三半导体并与其接触; 在所述第三半导体上形成第一绝缘体并与所述第三半导体接触; 以及在所述第一绝缘体上形成第一导体。

公开(公告)号：US20210184042A1

公开(公告)日：2021-06-17

申请号：US17167286

申请日：2021-02-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Mitsuhiro ICHIJO ,  Toshiya ENDO ,  Akihisa SHIMOMURA ,  Yuji EGI ,  Sachiaki TEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

公开(公告)号：US20190237586A1

公开(公告)日：2019-08-01

申请号：US16354394

申请日：2019-03-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta ENDO ,  Hideomi SUZAWA ,  Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/092 ,  H01L27/06 ,  H01L29/49 ,  H01L21/8258 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L21/76826 ,  H01L21/02321 ,  H01L21/76802 ,  H01L21/823418 ,  H01L21/823462 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US20190165179A1

公开(公告)日：2019-05-30

申请号：US16248903

申请日：2019-01-16

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a semiconductor, a first conductor, a second conductor, a third conductor, a fourth conductor, a first insulator, a second insulator, a third insulator, and a fourth insulator. The first conductor and the semiconductor partly overlap with each other with the first insulator positioned therebetween. The second conductor and the third conductor have regions in contact with the semiconductor. The semiconductor has a region in contact with the second insulator. The fourth insulator has a first region and a second region. The first region is thicker than the second region. The first region has a region in contact with the second insulator. The second region has a region in contact with the third insulator. The fourth conductor and the second insulator partly overlap with each other with the fourth insulator positioned therebetween.

公开(公告)号：US20170005203A1

公开(公告)日：2017-01-05

申请号：US15192312

申请日：2016-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta ENDO ,  Hideomi SUZAWA ,  Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78651 ,  H01L29/7869

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

Abstract translation: 提供了一种小型化的晶体管。 在半导体上的第三绝缘体上形成第一层; 在第一层上形成第二层; 在第二层上形成蚀刻掩模; 使用蚀刻掩模蚀刻第二层，直到第一层暴露以形成第三层; 选择性生长层形成在第三层的顶表面和侧表面上; 使用第三层和选择性生长层来蚀刻第一层，直到暴露第三绝缘体以形成第四层; 并且使用第三层，选择性生长层和第四层蚀刻第三绝缘体，直到半导体暴露以形成第一绝缘体。

公开(公告)号：US20140027764A1

公开(公告)日：2014-01-30

申请号：US13947724

申请日：2013-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Yoshinori IEDA ,  Toshiyuki MIYAMOTO ,  Masafumi NOMURA ,  Takashi HAMOCHI ,  Kenichi OKAZAKI ,  Mitsuhiro ICHIJO ,  Toshiya ENDO

IPC: H01L27/088

CPC classification number: H01L27/1207 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1225

Abstract: A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided. Further, a semiconductor device which has favorable electrical characteristics by using a transistor including a silicon semiconductor and a transistor including an oxide semiconductor is provided. Two nitride insulating films having different functions are provided between the transistor including a silicon semiconductor and the transistor including an oxide semiconductor. Specifically, a first nitride insulating film which contains hydrogen is provided over the transistor including a silicon semiconductor, and a second nitride insulating film which has a lower hydrogen content than the first nitride insulating film and functions as a barrier film against hydrogen is provided between the first nitride insulating film and the transistor including an oxide semiconductor.

Abstract translation: 提供一种防止在包括氧化物半导体的晶体管中氢扩散到氧化物半导体膜中的氮化物绝缘膜。 此外，提供了通过使用包括硅半导体的晶体管和包括氧化物半导体的晶体管具有良好的电特性的半导体器件。 在包括硅半导体的晶体管和包括氧化物半导体的晶体管之间提供具有不同功能的两个氮化物绝缘膜。 具体地说，在包括硅半导体的晶体管上设置含有氢的第一氮化物绝缘膜，并且在第一氮化物绝缘膜之间具有比第一氮化物绝缘膜低的氢含量并用作阻止氢的阻挡膜的第二氮化物绝缘膜 第一氮化物绝缘膜和包括氧化物半导体的晶体管。

公开(公告)号：US20180350997A1

公开(公告)日：2018-12-06

申请号：US16044600

申请日：2018-07-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Mitsuhiro ICHIJO ,  Toshiya ENDO ,  Akihisa SHIMOMURA ,  Yuji EGI ,  Sachiaki TEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78648

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

公开(公告)号：US20180182899A1

公开(公告)日：2018-06-28

申请号：US15900845

申请日：2018-02-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta ENDO ,  Hideomi SUZAWA ,  Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/8258 ,  H01L29/423 ,  H01L27/12 ,  H01L27/092 ,  H01L27/06 ,  H01L29/49

CPC classification number: H01L29/78648 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US20170358638A1

公开(公告)日：2017-12-14

申请号：US15669296

申请日：2017-08-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoshi MURAKAMI ,  Mitsuhiro ICHIJO ,  Taketomi ASAMI

IPC: H01L27/32 ,  H01L51/52 ,  H01L33/00 ,  H01L27/12 ,  H01L21/768

CPC classification number: H01L27/3258 ,  H01L21/7684 ,  H01L21/76841 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/3244 ,  H01L27/3246 ,  H01L27/3248 ,  H01L33/0041 ,  H01L51/5221 ,  H01L51/5253 ,  H01L2227/323 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.

公开(公告)号：US20170186779A1

公开(公告)日：2017-06-29

申请号：US15390894

申请日：2016-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo ITO ,  Takahisa ISHIYAMA ,  Katsuaki TOCHIBAYASHI ,  Yoshinori ANDO ,  Yasutaka SUZUKI ,  Mitsuhiro ICHIJO ,  Toshiya ENDO ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/7869 ,  H01L2224/05 ,  H01L2224/48463

Abstract: A highly reliable semiconductor device which includes an oxide semiconductor is provided. Alternatively, a transistor having normally-off characteristics which includes an oxide semiconductor is provided. The transistor includes a first conductor, a first insulator, a second insulator, a third insulator, a first oxide, an oxide semiconductor, a second conductor, a second oxide, a fourth insulator, a third conductor, a fourth conductor, a fifth insulator, and a sixth insulator. The second conductor is separated from the sixth insulator by the second oxide. The third conductor and the fourth conductor are separated from the sixth insulator by the fifth insulator. The second oxide has a function of suppressing permeation of oxygen as long as oxygen contained in the sixth insulator is sufficiently supplied to the oxide semiconductor through the second oxide. The fifth insulator has a barrier property against oxygen.