公开(公告)号：US20050163132A1

公开(公告)日：2005-07-28

申请号：US11077303

申请日：2005-03-10

申请人： Hironori Mieno ,  Youichi Konuma ,  Jyunichi Shimada ,  Koichi Saiki ,  Takashi Okuda ,  Takanori Sasaki

发明人： Hironori Mieno ,  Youichi Konuma ,  Jyunichi Shimada ,  Koichi Saiki ,  Takashi Okuda ,  Takanori Sasaki

IPC分类号： H04L12/44 ,  H04L12/46 ,  H04L12/56

CPC分类号： H04L12/465

摘要： In an L2 switch having a VLAN function for configuring a layer 2 network in a star topology, a mesh topology, a ring topology, or the like, a VLAN functional portion maps a frame to a predetermined VLAN, a frame classifying portion assigns to the frame a first tag indicating a priority, and a policing portion assigns to the frame a second tag indicating whether or not the frame can be discarded. Also, an OAM monitor inserts a monitoring frame to the VLAN.

摘要翻译： 在具有VLAN功能的L2交换机中，用于配置星型拓扑中的二层网络，网状拓扑，环形拓扑等，VLAN功能部分将帧映射到预定VLAN，帧分类部分分配给 构成指示优先级的第一标签，并且监管部分向该帧分配指示该帧是否可以被丢弃的第二标签。 另外，OAM监视器将监控帧插入VLAN。

公开(公告)号：US06846276B2

公开(公告)日：2005-01-25

申请号：US10034097

申请日：2002-01-03

申请人： Kaoru Yasumatsuya ,  Takashi Okuda

发明人： Kaoru Yasumatsuya ,  Takashi Okuda

IPC分类号： B23Q3/155 ,  B23Q3/157 ,  G05B19/18

CPC分类号： G05B19/182 ,  Y10T483/10 ,  Y10T483/1755 ,  Y10T483/1757 ,  Y10T483/176

摘要： The present invention relates a tool changer controlling method and apparatus, which can reduce a tool changing time as compared with the prior art. The controlling apparatus controls operation of a tool changer (1) which comprises a changer arm (2) for holding tools (Ta,Tb) and is adapted to pivot the changer arm (2) by a driving system including a servo motor (5) and exchange the tool (Ta) attached to a main spindle (20) in a tool changing position and the tool (Tb) in a predetermined position. The servo motor (5) is driven and controlled so that the changer arm (2) is preliminarily pivoted by a predetermined angle when the main spindle (20) is moved to the tool changing position, and further pivoted to the tool changing position after the main spindle (20) reaches the tool changing position.

摘要翻译： 本发明涉及一种与现有技术相比可以减少换刀时间的换刀控制方法和装置。 控制装置控制工具更换器（1）的操作，其包括用于保持工具（Ta，Tb）的更换器臂（2），并且适于通过包括伺服电动机（5）的驱动系统使变换器臂（2）枢转， 并将安装在工具更换位置的主轴（20）上的工具（Ta）和工具（Tb）交换到预定位置。 伺服电机（5）被驱动和控制，使得当主轴（20）移动到换刀位置时，更换臂（2）预先枢转预定角度，并且在该主轴 主轴（20）到达换刀位置。

公开(公告)号：US08223050B2

公开(公告)日：2012-07-17

申请号：US12911345

申请日：2010-10-25

申请人： Takashi Matsumoto ,  Toshio Kumamoto ,  Takashi Okuda

发明人： Takashi Matsumoto ,  Toshio Kumamoto ,  Takashi Okuda

IPC分类号： H03M1/20

CPC分类号： H03M3/332 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/12 ,  H03M3/30 ,  H03M3/43 ,  H03M3/452 ,  H03M3/454

摘要： In a delta-sigma A/D converter provided with plural channels for converting an analog input signal into a digital signal, an adverse influence of an idle tone is reduced in each channel. The delta-sigma A/D converter comprises: a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer.

摘要翻译： 在具有用于将模拟输入信号转换为数字信号的多个通道的Δ-ΣA / D转换器中，在每个通道中降低了空闲音调的不利影响。 Δ-ΣA / D转换器包括：量化并输出接收信号的第一量化器; 第一D / A转换器，其将第一量化器的输出信号转换为模拟信号，并输出转换的模拟信号; 第一操作单元，其输出表示第一模拟输入信号和第一D / A转换器的输出信号的差的信号; 第一积分器，其对第一运算单元的输出信号进行积分并输出积分信号; 产生第一抖动信号的第一抖动电路; 以及第二操作单元，其将第一抖动信号添加到第一积分器的输出信号，并将相加的信号输出到第一量化器。

公开(公告)号：US08188526B2

公开(公告)日：2012-05-29

申请号：US12958923

申请日：2010-12-02

申请人： Takashi Okuda ,  Toshio Kumamoto

发明人： Takashi Okuda ,  Toshio Kumamoto

IPC分类号： H01L27/08 ,  H01L29/94

CPC分类号： H01L23/585 ,  H01L27/0248 ,  H01L27/092 ,  H01L2924/0002 ,  H01L2924/00

摘要： It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.

摘要翻译： 本发明的目的是确保将模拟块中的预定半导体元件或预定半导体元件组与数字块产生的噪声保护起来。 根据本发明的半导体器件包括半导体衬底，作为形成数字电路的区域的数字块和形成模拟电路的区域的模拟块，通过将模拟电路的上表面 半导体基板和设置在半导体基板上的基板电位固定区域，以在平面图中包围模拟块中的预定半导体元件组，以及连接到基板电位固定区域并从外部接收预定电位的焊盘 部分。

公开(公告)号：US07915708B2

公开(公告)日：2011-03-29

申请号：US12485528

申请日：2009-06-16

申请人： Takashi Okuda ,  Yasuo Morimoto ,  Yuko Maruyama ,  Toshio Kumamoto

发明人： Takashi Okuda ,  Yasuo Morimoto ,  Yuko Maruyama ,  Toshio Kumamoto

IPC分类号： H01L29/00

CPC分类号： H01L23/5223 ,  H01L23/5225 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate including a main surface; a plurality of first interconnections formed in a capacitance forming region defined on the main surface and extending in a predetermined direction; a plurality of second interconnections each adjacent to the first interconnection located at an edge of the capacitance forming region, extending in the predetermined direction, and having a fixed potential; and an insulating layer formed on the main surface and filling in between each of the first interconnections and between the first interconnection and the second interconnection adjacent to each other. The first interconnections and the second interconnections are located at substantially equal intervals in a plane parallel to the main surface, and located to align in a direction substantially perpendicular to the predetermined direction.

摘要翻译： 半导体器件包括：包括主表面的半导体衬底; 多个第一互连形成在形成在主表面上并沿预定方向延伸的电容形成区域中; 多个第二互连，每个相邻于位于电容形成区域的边缘处的第一互连，沿预定方向延伸并具有固定电位; 以及绝缘层，形成在主表面上，并且填充在每个第一互连之间以及第一互连和第二互连之间相邻。 第一互连和第二互连在平行于主表面的平面中以基本相等的间隔定位，并且被定位成在基本上垂直于预定方向的方向上对齐。

公开(公告)号：US07868413B2

公开(公告)日：2011-01-11

申请号：US12267166

申请日：2008-11-07

申请人： Takashi Okuda ,  Toshio Kumamoto

发明人： Takashi Okuda ,  Toshio Kumamoto

IPC分类号： H01L21/762

CPC分类号： H01L23/585 ,  H01L27/0248 ,  H01L27/092 ,  H01L2924/0002 ,  H01L2924/00

摘要： It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.

摘要翻译： 本发明的目的是确保将模拟块中的预定半导体元件或预定半导体元件组与数字块产生的噪声保护起来。 根据本发明的半导体器件包括半导体衬底，作为形成数字电路的区域的数字块和形成模拟电路的区域的模拟块，通过将模拟电路的上表面 半导体基板和设置在半导体基板上的基板电位固定区域，以在平面图中包围模拟块中的预定半导体元件组，以及连接到基板电位固定区域并从外部接收预定电位的焊盘 部分。

公开(公告)号：US20090297149A1

公开(公告)日：2009-12-03

申请号：US12318321

申请日：2008-12-24

申请人： Hiroaki Nakazato ,  Hiroyuki Hanazawa ,  Takashi Okuda

发明人： Hiroaki Nakazato ,  Hiroyuki Hanazawa ,  Takashi Okuda

IPC分类号： H04J14/02

CPC分类号： G02B6/29383 ,  G02B6/2931 ,  G02B6/29313 ,  H04J14/0204 ,  H04J14/0209 ,  H04J14/021 ,  H04J14/0212

摘要： A disclosed optical add/drop multiplexing device demultiplexes a first signal into multiple signals according to wavelengths, drops one or more of the demultiplexed signals to a transponder, adds one or more signals output from the transponder, multiplexes these signals into a second signal, and outputs it. The device includes an injecting unit for injecting one of measurement signals, each of whose wavelength corresponds to that of a different demultiplexed signal, into a core of a multicore cable within the device, the core being used to transmit the different demultiplexed signal having the corresponding wavelength; a preventing unit for preventing the one measurement signal from emanating; a measuring unit for measuring, for each wavelength, levels of the one measurement signal before and after the corresponding core; a calculating unit for calculating loss of the corresponding core, based on the measured levels; and an informing unit for reporting the calculated loss.

摘要翻译： 所公开的光分插复用装置根据波长将第一信号解复用为多个信号，将解复用信号中的一个或多个下降到应答器，将从应答器输出的一个或多个信号相加，将这些信号复用为第二信号，以及 输出。 该装置包括一个注射单元，用于将每个波长对应于不同解复用信号的测量信号中的一个注入设备内的多芯电缆的核心，该核心用于发射具有相应的不同解复用信号 波长; 用于防止一个测量信号发出的防止单元; 测量单元，用于针对每个波长测量相应芯之前和之后的一个测量信号的电平; 计算单元，用于基于所测量的水平计算相应核心的损耗; 以及报告计算损失的通知单位。

公开(公告)号：US20090124004A1

公开(公告)日：2009-05-14

申请号：US12313645

申请日：2008-11-21

申请人： Takahiro Kikawada ,  Takashi Okuda ,  Masahiko Watanabe ,  Kazuei Mita ,  Keiko Kadono

发明人： Takahiro Kikawada ,  Takashi Okuda ,  Masahiko Watanabe ,  Kazuei Mita ,  Keiko Kadono

IPC分类号： C12N15/63 ,  C07H21/04 ,  C12N5/10

CPC分类号： C07K14/43563

摘要： An objective of the present invention is to provide polynucleotides encoding insect desiccation resistance proteins, and uses thereof. cDNA libraries were produced from Polypedilum vanderplanki larvae in a desiccated state, a P. vanderplanki EST database was constructed, and genes encoding LEA proteins were isolated. This resulted in the successful isolation of three types of novel gene encoding LEA-like proteins (PvLEA1, PvLEA2, and PvLEA3.) When secondary structure predictions and motif searches were performed on the proteins deduced from each of the genes, all three proteins had α-helix-rich structures and LEA_4 motifs, which are characteristic of LEA proteins. Moreover, the recombinant proteins synthesized from PvLEA1, 2 and 3 genes were heat soluble even when boiling, so that PvLEA1, 2 and 3 proteins have highly hydrophilic property as well as plant LEA proteins. Therefore, the three isolated genes were found to be novel P. vanderplanki-derived LEA genes. Furthermore, introduction of these PvLEA 1, 2 and 3 genes into animal cells successfully conferred desiccation resistance to the cells. The present invention provides the first example of LEA genes isolated from insects.

摘要翻译： 本发明的目的是提供编码昆虫耐干燥性蛋白质的多核苷酸及其用途。 在干燥状态下从Polypedilum vanderplanki幼虫生产cDNA文库，构建了P.vanderplanki EST数据库，分离了编码LEA蛋白的基因。 这导致了三种类型的编码LEA样蛋白的新基因（PvLEA1，PvLEA2和PvLEA3）的成功分离。当对从每个基因推导的蛋白进行二级结构预测和基序搜索时，所有三种蛋白都具有α 富含螺旋的结构和LEA_4基序，是LEA蛋白的特征。 此外，由PvLEA1,2和3基因合成的重组蛋白即使在沸腾时也是热溶性的，因此PvLEA1,2和3蛋白具有高亲水性以及植物LEA蛋白。 因此，发现三个分离的基因是新的P. vanderplanki衍生的LEA基因。 此外，将这些PvLEA 1,2和3基因引入动物细胞成功地赋予细胞干燥抗性。 本发明提供了从昆虫分离的LEA基因的第一个实例。

公开(公告)号：US06703957B2

公开(公告)日：2004-03-09

申请号：US10143878

申请日：2002-05-14

申请人： Yasuo Morimoto ,  Toshio Kumamoto ,  Takashi Okuda ,  Takahiro Miki

发明人： Yasuo Morimoto ,  Toshio Kumamoto ,  Takashi Okuda ,  Takahiro Miki

IPC分类号： H03M166

CPC分类号： H03M1/0614 ,  H03K5/01 ,  H03K5/133 ,  H03M1/822 ,  H03M3/372 ,  H03M3/506

摘要： When forming PDM pulses by a D/A converter in accordance with digital signals, the D/A converter causes at least one of the rising stage and the falling stage of each of the PDM pulses to change stepwise. In addition, when forming PWM pulses by another D/A converter, the D/A converter causes at least one of the rising stage and the falling stage of each of the PWM pulses to change stepwise.

摘要翻译： 当通过D / A转换器根据数字信号形成PDM脉冲时，D / A转换器使得每个PDM脉冲的上升沿和下降沿中的至少一个逐步改变。 此外，当由另一个D / A转换器形成PWM脉冲时，D / A转换器使每个PWM脉冲的上升沿和下降沿中的至少一个逐步改变。

公开(公告)号：US06538589B2

公开(公告)日：2003-03-25

申请号：US10136416

申请日：2002-05-02

申请人： Takashi Okuda ,  Toshio Kumamoto ,  Yasuo Morimoto

发明人： Takashi Okuda ,  Toshio Kumamoto ,  Yasuo Morimoto

IPC分类号： H03M300

CPC分类号： H03M7/3006 ,  H03M7/302

摘要： A digital &Dgr;&Sgr; modulator comprises a first-stage 1-bit &Dgr;&Sgr; modulator provided with an 1-bit (1 is an arbitrary natural number) quantizer, for modulating digital data, a correction logic for multiplying a quantization error caused in the 1-bit quantizer by a correction so that the quantization error caused in the 1-bit quantizer is eliminated at an output of the first-stage 1-bit &Dgr;&Sgr; modulator, and a next-stage m-bit &Dgr;&Sgr; modulator provided with an m-bit (m is an arbitrary natural number larger than 1) quantizer, for modulating and feeding the quantization error which is multiplied by the correction by the correction logic back to the first-stage 1-bit &Dgr;&Sgr; modulator.

摘要翻译： 一个数字DELTASIGMA调制器包括一个第一级1位DELTASIGMA调制器，它配备1位（1为任意自然数）量化器，用于调制数字数据;一个校正逻辑，用于将1位量化器中引起的量化误差相乘 通过校正，使得在第一级1位DELTASIGMA调制器的输出处消除在1位量化器中引起的量化误差，并且提供具有m位的下一级m位DELTASIGMA调制器（m是 大于1）量化器的任意自然数，用于将与校正逻辑的校正相乘的量化误差调制和馈送回到第一级1位DELTASIGMA调制器。