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86 条记录 (耗时 0.033 秒)

    Emulation of static random access memory (SRAM) by magnetic random access memory (MRAM)
    21.
    发明授权
    Emulation of static random access memory (SRAM) by magnetic random access memory (MRAM) 有权
    磁性随机存取存储器（MRAM）对静态随机存取存储器（SRAM）的仿真

    公开(公告)号：US08755221B2

    公开(公告)日：2014-06-17

    申请号：US13187402

    申请日：2011-07-20

    申请人： Petro Estakhri ,  Ebrahim Abedifard ,  Frederick Jaffin ,  Siamack Nemazie

    发明人： Petro Estakhri ,  Ebrahim Abedifard ,  Frederick Jaffin ,  Siamack Nemazie

    IPC分类号： G11C11/14

    CPC分类号： G11C11/1673 ,  G11C7/1042 ,  G11C8/04 ,  G11C11/1653 ,  G11C11/1675 ,  G11C11/1693

    摘要： A magnetic memory system includes a magnetic random access memory (MRAM) including a plurality of magnetic memory banks and operative to store data during a write operation initiated by a write command. The magnetic memory system further includes a first-in-first-out (FIFO) interface device coupled to the MRAM and including a plurality of FIFOs Each of the magnetic memory banks is coupled to a respective one of the plurality of FIFOs, the FIFO being operative to queue write commands on a per magnetic memory bank basis and further operative to issue the queued write commands at a time when the MRAM is not in use, wherein concurrent write operations are performed to at least two of the plurality of magnetic memory banks.

    摘要翻译： 磁存储器系统包括包括多个磁存储器组的磁随机存取存储器（MRAM），并且可操作以在由写命令发起的写操作期间存储数据。 磁存储器系统还包括耦合到MRAM并且包括多个FIFO的先进先出（FIFO）接口设备。每个磁存储器组耦合到多个FIFO中的相应一个，FIFO是 可操作地在每个磁存储体的基础上排队写入命令，并进一步操作以在不使用MRAM时发出排队的写入命令，其中并行写入操作被执行到多个磁存储器组中的至少两个。

    Differential magnetic random access memory (MRAM)
    22.
    发明授权
    Differential magnetic random access memory (MRAM) 有权
    差分磁随机存取存储器（MRAM）

    公开(公告)号：US08385108B1

    公开(公告)日：2013-02-26

    申请号：US13429293

    申请日：2012-03-23

    申请人： Ebrahim Abedifard ,  Siamack Nemazie ,  Parviz Keshtbod

    发明人： Ebrahim Abedifard ,  Siamack Nemazie ,  Parviz Keshtbod

    IPC分类号： G11C11/00

    CPC分类号： G11C11/14 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1697

    摘要： A method of method of writing to a magnetic memory cell includes selecting a magnetic memory cell of a magnetic memory array to be written to, the magnetic memory cell including a pair of MTJs, and setting a bit line (BL) coupled to the magnetic memory cell to a state that causes current to flow through the pair of MTJs in a manner that causes the direction of current flow through one of the MTJs of the pair of MTJs to be in a direction opposite to that of the other MTJ of the pair of MTJs.

    摘要翻译： 写入磁存储单元的方法的方法包括选择要写入的磁存储器阵列的磁存储单元，磁存储单元包括一对MTJ，以及设置耦合到磁存储器的位线（BL） 电池导致电流流过该对MTJ的状态，使得电流流过该对MTJ的MTJ之一的电流的方向处于与该对MTJ的另一个MTJ的方向相反的方向 MTJs。

    Error scanning in flash memory
    23.
    发明授权
    Error scanning in flash memory 有权
    在闪存中扫描错误

    公开(公告)号：US08356216B2

    公开(公告)日：2013-01-15

    申请号：US13346538

    申请日：2012-01-09

    申请人： William Henry Radke ,  Peter Sean Feeley ,  Siamack Nemazie

    发明人： William Henry Radke ,  Peter Sean Feeley ,  Siamack Nemazie

    IPC分类号： G11C29/00

    CPC分类号： G06F11/006 ,  G06F11/106

    摘要： Various embodiments include methods, apparatus, and systems to scan at least a portion of a memory device for potential errors when a condition for scanning is met. The condition may be dependent on one or more of a number of read operations, a number of write operations, time, and others. Other embodiments including additional methods, apparatus, and systems are disclosed.

    摘要翻译： 各种实施例包括当满足扫描条件时扫描存储器件的至少一部分以用于潜在错误的方法，装置和系统。 条件可以取决于多个读取操作，多个写入操作，时间等中的一个或多个。 公开了包括附加方法，装置和系统的其它实施例。

    High performance architecture for fiber channel targets and target bridges
    30.
    发明授权
    High performance architecture for fiber channel targets and target bridges 失效
    光纤通道目标和目标桥梁的高性能架构

    公开(公告)号：US07986630B1

    公开(公告)日：2011-07-26

    申请号：US11165713

    申请日：2005-06-24

    申请人： Siamack Nemazie ,  Shiang-Jyh Chang ,  Young-Ta Wu ,  Andrew Hyonil Chong

    发明人： Siamack Nemazie ,  Shiang-Jyh Chang ,  Young-Ta Wu ,  Andrew Hyonil Chong

    IPC分类号： G01R31/08

    CPC分类号： G06F13/4247 ,  G06F2213/0032

    摘要： An embodiment of the present invention is disclosed to include a fiber channel target device for receiving information in the form of frames and including a controller device coupled to a microprocessor for processing the frames received from the host, at least one receive buffer for storing the frames and having a buffer size, the controller device issuing credit to the host for receipt of further frames in a manner wherein only one microprocessor is needed to process the frames while maintaining a buffer size that is as small as the number of first type of frames that can be received by the fiber channel target device from the host.

    摘要翻译： 公开了本发明的一个实施例，其包括用于以帧的形式接收信息的光纤通道目标设备，并且包括耦合到微处理器的控制器设备，用于处理从主机接收的帧，至少一个用于存储帧的接收缓冲器 并且具有缓冲器大小，所述控制器设备向所述主机发出信用以接收另外的帧，其中只需要一个微处理器来处理所述帧，同时保持与第一类型的帧的数量一样小的缓冲器大小， 可由光纤通道目标设备从主机接收。