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公开(公告)号：US20140266509A1
公开(公告)日：2014-09-18
申请号：US13828066
申请日：2013-03-14
Applicant: SILICON LABORATORIES INC.
Inventor： Aaron J. Caffee , Jeffrey L. Sonntag , Brian G. Drost , Mehrnaz Motiee
IPC: H03H9/24
CPC classification number: H03H9/2457 , H03B5/30 , H03H9/02259 , H03H9/02275 , H03H9/2431 , H03H2009/02291 , H03H2009/02346 , H03H2009/02496
Abstract: An apparatus includes a microelectromechanical system (MEMS) device. The MEMS device includes a resonator suspended from a substrate, an anchor disposed at a center of the resonator, a plurality of suspended beams radiating between the anchor and the resonator, a plurality of first electrodes disposed about the anchor, and a plurality of second electrodes disposed about the anchor. The plurality of first electrodes and the resonator form a first electrostatic transducer. The plurality of second electrodes and the resonator form a second electrostatic transducer. The first electrostatic transducer and the second electrostatic transducer are configured to sustain rotational vibrations of the resonator at a predetermined frequency about an axis through the center of the resonator and orthogonal to a plane of the substrate in response to a signal on the first electrode.
Abstract translation: 一种装置包括微机电系统（MEMS）装置。 MEMS器件包括从衬底悬挂的谐振器，设置在谐振器中心的锚，在锚和谐振器之间辐射的多个悬臂，围绕锚定器设置的多个第一电极和多个第二电极 围绕锚点布置。 多个第一电极和谐振器形成第一静电换能器。 多个第二电极和谐振器形成第二静电换能器。 第一静电换能器和第二静电换能器被配置为响应于第一电极上的信号，以围绕谐振器的中心的轴线以预定的频率维持谐振器的旋转振动并且与基板的平面正交。
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公开(公告)号：US10778230B2
公开(公告)日：2020-09-15
申请号：US16661049
申请日：2019-10-23
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
Abstract: A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.
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公开(公告)号：US20200162079A1
公开(公告)日：2020-05-21
申请号：US16661049
申请日：2019-10-23
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
Abstract: A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.
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公开(公告)号：US10601431B2
公开(公告)日：2020-03-24
申请号：US16022188
申请日：2018-06-28
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Jeffrey L. Sonntag , Brian G. Drost , Volodymyr Kratyuk
Abstract: A time-to-voltage converter is configured to generate an output voltage signal and a correlated reference voltage signal. The time-to-voltage converter includes a current source configured to generate a bias current through a current source output node. The time-to-voltage converter includes a first switched-capacitor circuit coupled to the current source output node and configured to generate the output voltage signal based on an input time signal and the bias current during a first interval. The time-to-voltage converter includes a second switched-capacitor circuit coupled to the current source output node and configured to generate the correlated reference voltage signal based on a reference time signal and the bias current during a second interval. The first interval and the second interval are non-overlapping intervals.
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25.发明申请公开(公告)号：US20190305783A1
公开(公告)日：2019-10-03
申请号：US15944567
申请日：2018-04-03
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Russell Croman , Brian G. Drost
Abstract: A clock generator includes an oscillator configured to generate an oscillating signal and a signal path configured to provide an output clock signal based on the oscillating signal. In response to a control signal, the clock generator is configured to neutralize periodic phase perturbations in the oscillating signal using opposing periodic phase perturbations. The neutralization may occur in the signal path. The signal path may be responsive to the control signal to adjust at least one of a duty cycle, a rise time, and a fall time of the output clock signal to cause alternating phase perturbations of the periodic phase perturbations to apply as the opposing periodic phase perturbations in the output clock signal. The neutralization may occur in the oscillator. The clock generator may include an auxiliary path configured to provide an auxiliary signal to the oscillator.
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Patent Agency Ranking
公开(公告)号：US10296026B2
公开(公告)日：2019-05-21
申请号：US14918651
申请日：2015-10-21
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Vaibhav Karkare
Abstract: A low-noise voltage reference generator that utilizes internal gain and feedback to generate an output signal having reduced sensitivity to power supply variations and loading conditions is described. A method includes generating a current based on a voltage drop across a resistor. The voltage drop is based on a second voltage drop across a gate terminal of a transistor and a source terminal of the transistor. The method includes the current using a reference voltage to generate a mirrored current through a node coupled to the drain terminal of the transistor. The method includes generating a level-shifted voltage using a voltage on the node. The method includes buffering the level-shifted voltage using a power supply voltage to generate the reference voltage.
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公开(公告)号：US10254176B2
公开(公告)日：2019-04-09
申请号：US14246461
申请日：2014-04-07
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Jeffrey L. Sonntag
Abstract: An apparatus includes a thermistor having a variable resistance with a first dependence on absolute temperature. The apparatus includes a reference resistor having a resistance with a second dependence on absolute temperature, the second dependence being less than or having opposite polarity to the first dependence. The reference resistor includes a switched-capacitor circuit. The apparatus includes a node coupled between the thermistor and the reference resistor. The node is configured to provide a signal indicative of absolute temperature based on the variable resistance and the reference resistance. The signal may be strain-invariant, proportional to a reference voltage, and indicative of a ratio of the variable resistance to the reference resistance. The apparatus may include a feedback circuit configured to maintain the node at a predetermined voltage level.
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公开(公告)号：US20180191384A1
公开(公告)日：2018-07-05
申请号：US15395033
申请日：2016-12-30
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost , Alessandro Piovaccari , Aslamali A. Rafi
CPC classification number: H04B1/0475 , H03F1/0205 , H03F1/32 , H03F3/19 , H03F3/21 , H03F2200/451 , H03L7/08 , H04B3/06 , H04B2001/045 , H04L7/0331 , H04L27/364 , H04L27/367
Abstract: A technique that reduces or eliminates trading-off power amplifier efficiency and costly external filtering in amplitude and phase modulated sinusoidal signal generation uses multi-phase outphasing and a multi-phase switching mode power amplifier to generate the amplitude and phase modulated sinusoidal signals. The technique combines multiple clock phases with sinusoidally weighted circuits of the switching mode power amplifier to improve amplitude and phase modulated sinusoidal signal generation.
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公开(公告)号：US10008981B2
公开(公告)日：2018-06-26
申请号：US15096612
申请日：2016-04-12
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost , Hendricus de Ruijter
IPC: H03B5/08 , H03B5/12 , H03L1/00 , H03B5/36 , H03L1/02 , H03L7/02 , H03L7/087 , H03L7/095 , H03L7/22 , H03L7/23 , H03L7/183 , H03L7/197
CPC classification number: H03B5/1234 , H03B5/12 , H03B5/1265 , H03B5/36 , H03L1/00 , H03L1/026 , H03L7/02 , H03L7/087 , H03L7/095 , H03L7/183 , H03L7/1976 , H03L7/22 , H03L7/23
Abstract: An integrated clock generator includes a tunable LC oscillator, a tunable frequency synthesizer, and a processor. The tunable LC oscillator has an input for receiving an oscillator control signal, and an output for providing an oscillator clock signal. The tunable frequency synthesizer has a clock input coupled to the output of the tunable LC oscillator, a control input for receiving a synthesizer control signal, and an output for providing a clock output signal. The processor has an input for receiving a data input signal, a first output for providing the oscillator control signal, and a second output for providing the synthesizer control signal. The processor provides the oscillator control signal and the synthesizer control signal such that the tunable frequency synthesizer generates the output clock signal at a frequency indicated by the data input signal, and provides the synthesizer control signal further in response to a dynamic condition.
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公开(公告)号：US20180150031A1
公开(公告)日：2018-05-31
申请号：US15365869
申请日：2016-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee
IPC: G04F10/00
CPC classification number: G04F10/005
Abstract: A technique for sensing an environmental parameter is disclosed. The technique generates an oscillating signal using a variable resistance sensitive to a variable parameter. A frequency of the oscillating signal is directly dependent on the variable resistance. A time-to-digital converter generates a digital code indicative of the variable resistance. The digital code is generated based on the frequency of the oscillating signal and a second frequency of a reference clock signal. The second frequency is insensitive to the variable parameter. The variable resistance may be a metal resistor and the reference resistance may be generated using a capacitor that is switched at a particular frequency. The measured resistance may be used to control a voltage-controlled oscillator. The oscillating signal frequency may be converted to a digital signal and post-processed for use as an indicator of absolute temperature or other environmental parameter.
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