公开(公告)号：US20070132057A1

公开(公告)日：2007-06-14

申请号：US11298095

申请日：2005-12-08

Applicant: Giuseppe Curello ,  Ian Post ,  Chia-Hong Jan ,  Sunit Tyagi ,  Mark Bohr

Inventor： Giuseppe Curello ,  Ian Post ,  Chia-Hong Jan ,  Sunit Tyagi ,  Mark Bohr

IPC: H01L29/00 ,  H01L21/76

CPC classification number: H01L21/823481 ,  H01L21/26506 ,  H01L21/823418 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/7833 ,  H01L29/7834

Abstract: A semiconductor device and method for its fabrication are described. An active region spacer may be formed on a top surface of an isolation region and adjacent to a sidewall of an active region. In one embodiment, the active region spacer may suppress the formation of metal pipes in the active region.

Abstract translation: 对半导体装置及其制造方法进行说明。 有源区隔离物可以形成在隔离区的顶表面上并且邻近有源区的侧壁。 在一个实施例中，有源区间隔物可以抑制活性区域中的金属管的形成。

公开(公告)号：US20060065937A1

公开(公告)日：2006-03-30

申请号：US10954914

申请日：2004-09-30

Applicant: Thomas Hoffmann ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

Inventor： Thomas Hoffmann ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

IPC: H01L29/76 ,  H01L21/336

CPC classification number: H01L29/66636 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/41783 ,  H01L29/66492 ,  H01L29/7834 ,  H01L29/7848

Abstract: A method of providing a halo implant region in a substrate of a MOS device having a gate electrode thereon and defining source/drain regions, a MOS device fabricated according to the above method, and a system comprising the MOS device. The method comprises: defining undercut recesses in the substrate at the source/drain regions thereof, the undercut recesses extending beneath the gate electrode; creating a halo implant region beneath the gate electrode between the recesses; and providing raised source/drain structures in the undercut recesses after creating the halo implant region.

Abstract translation: 在其上具有栅电极并限定源/漏区的MOS器件的衬底中提供卤素注入区的方法，根据上述方法制造的MOS器件和包括MOS器件的系统。 该方法包括：在其源极/漏极区域处限定衬底中的底切凹部，在栅电极下方延伸的底切凹部; 在所述凹部之间的所述栅极电极下面形成晕圈植入区域; 并且在产生晕圈植入区域之后在底切凹槽中提供升高的源极/漏极结构。

公开(公告)号：US06787440B2

公开(公告)日：2004-09-07

申请号：US10315268

申请日：2002-12-10

Applicant: Christopher G. Parker ,  Markus Kuhn ,  Ying Zhou ,  Scott A. Hareland ,  Suman Datta ,  Nick Lindert ,  Robert S. Chau ,  Timothy E. Glassman ,  Matthew V. Metz ,  Sunit Tyagi

Inventor： Christopher G. Parker ,  Markus Kuhn ,  Ying Zhou ,  Scott A. Hareland ,  Suman Datta ,  Nick Lindert ,  Robert S. Chau ,  Timothy E. Glassman ,  Matthew V. Metz ,  Sunit Tyagi

IPC: H01L214763

CPC classification number: H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

Abstract: A method for making a semiconductor device is described. That method comprises forming on a substrate a buffer layer and a high-k gate dielectric layer, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high-k gate dielectric layer.

公开(公告)号：US06372583B1

公开(公告)日：2002-04-16

申请号：US09500556

申请日：2000-02-09

Applicant: Sunit Tyagi

Inventor： Sunit Tyagi

IPC: H01L21336

CPC classification number: H01L29/0847 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

Abstract: A method for making a semiconductor device. In that method, source and drain regions are epitaxially grown on a first part of a substrate. After a gate oxide is formed on a second part of the substrate, an etched polysilicon layer is formed on the gate oxide.

Abstract translation: 一种制造半导体器件的方法。 在该方法中，源极和漏极区域在衬底的第一部分上外延生长。 在基板的第二部分上形成栅极氧化物之后，在栅极氧化物上形成蚀刻的多晶硅层。

公开(公告)号：US20190265387A1

公开(公告)日：2019-08-29

申请号：US16409055

申请日：2019-05-10

Applicant: Sunit Tyagi

Inventor： Sunit Tyagi

IPC: G01W1/06 ,  G01W1/17 ,  E02B1/00 ,  F03G7/05 ,  F03D9/30 ,  G06N7/00 ,  F03B17/06

Abstract: Surface modification control stations and methods in a globally distributed array for dynamically adjusting the atmospheric, terrestrial and oceanic properties. The control stations modify the humidity, currents, wind flows and heat removal rate of the surface and facilitate cooling and control of large area of global surface temperatures. This global system is made of arrays of multiple sub-systems that monitor climate and act locally on weather with dynamically generated local forcing & perturbations for guiding in a controlled manner aim at long-term modifications. The machineries are part of a large-scale system consisting of an array of many such machines put across the globe at locations called the control stations. These are then used in a coordinated manner to modify large area weather and the global climate as desired. The energy system installed at a control stations, with multiple machines to change the local parameters of the ocean, these stations are powered using renewable energy (RE) sources including Solar, Ocean Currents, Wind, Waves and Batteries to store energy and provide sufficient power and energy as required and available at all hours. This energy is then used to do directed work using special machines, that can be pumps for seawater to move ocean water either amplifying or changing the currents in various locations and at different depths, in addition it will have machineries for changing the vertical depth profile of the ocean of temperature, salinity and currents. Control stations will also directly use devices such as heat pumps to change the temperatures of local water either at surface or at controlled depths, or modify the humidity and salinity to change the atmospheric and oceanic properties as desired. The system will work in a globally coordinated manner applying artificial intelligence and machine learning algorithms to learn from observations to improve the control characteristics and aim to slow down the rise of global surface temperatures. These systems are used to reduce the temperatures of coral reefs, arctic glaciers and south pacific to control the El Nino oscillations.

公开(公告)号：US20080311720A1

公开(公告)日：2008-12-18

申请号：US12218157

申请日：2008-07-11

Applicant: Thomas Hoffman ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

Inventor： Thomas Hoffman ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

IPC: H01L21/336

CPC classification number: H01L29/66636 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/41783 ,  H01L29/66492 ,  H01L29/7834 ,  H01L29/7848

Abstract: A method of forming a transistor comprising: defining undercut recesses in the substrate at the source/drain regions thereof, the undercut recesses extending beneath the gate electrode; creating a halo implant region beneath the gate electrode between the recesses; and providing raised source/drain structures in the undercut recesses after creating the halo implant region.

Abstract translation: 一种形成晶体管的方法，包括：在其源极/漏极区域处在衬底中限定底切凹部，在栅电极下方延伸的底切凹部; 在所述凹部之间的所述栅极电极下面形成晕圈植入区域; 并且在产生晕圈植入区域之后在底切凹槽中提供升高的源极/漏极结构。

公开(公告)号：US07422950B2

公开(公告)日：2008-09-09

申请号：US11304351

申请日：2005-12-14

Applicant: Giuseppe Curello ,  Hemant V. Deshpande ,  Sunit Tyagi ,  Mark Bohr

Inventor： Giuseppe Curello ,  Hemant V. Deshpande ,  Sunit Tyagi ,  Mark Bohr

IPC: H01L21/84

CPC classification number: H01L29/66628 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/7848 ,  H01L29/78639 ,  H01L29/78687

Abstract: A MOS device comprises a gate stack comprising a gate electrode disposed on a gate dielectric, a first spacer and a second spacer formed on laterally opposite sides of the gate stack, a source region proximate to the first spacer, a drain region proximate to the second spacer, and a channel region subjacent to the gate stack and disposed between the source region and the drain region. The MOS device of the invention further includes a buried oxide (BOX) region subjacent to the channel region and disposed between the source region and the drain region. The BOX region enables deeper source and drain regions to be formed to reduce transistor resistance and silicide spike defects while preventing gate edge junction parasitic capacitance.

Abstract translation: MOS器件包括栅极堆叠，其包括设置在栅极电介质上的栅极电极，形成在栅极堆叠的横向相对侧上的第一间隔物和第二间隔物，靠近第一间隔物的源极区域，靠近第二间隔区的漏极区域 间隔物和位于栅叠层下方的沟道区，并设置在源区和漏区之间。 本发明的MOS器件还包括在沟道区域的下方并设置在源极区域和漏极区域之间的掩埋氧化物（BOX）区域。 BOX区域能够形成更深的源极和漏极区域，以减少晶体管电阻和硅化物尖峰缺陷，同时防止栅极边缘结的寄生电容。

公开(公告)号：US07335959B2

公开(公告)日：2008-02-26

申请号：US11031843

申请日：2005-01-06

Applicant: Giuseppe Curello ,  Bernhard Sell ,  Sunit Tyagi ,  Chris Auth

Inventor： Giuseppe Curello ,  Bernhard Sell ,  Sunit Tyagi ,  Chris Auth

IPC: H01L29/76 ,  H01L29/94

CPC classification number: H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7842

Abstract: Embodiments of the invention provide a transistor with stepped source and drain regions. The stepped regions may provide significant strain in a channel region while minimizing current leakage. The stepped regions may be formed by forming two recesses in a substrate to result in a stepped recess, and forming the source/drain regions in the recesses.

Abstract translation: 本发明的实施例提供了具有阶梯式源极和漏极区域的晶体管。 台阶区域可以在通道区域中提供显着的应变，同时最小化电流泄漏。 可以通过在基板中形成两个凹槽来形成阶梯状区域，以形成阶梯状凹陷，并且在凹部中形成源极/漏极区域。

公开(公告)号：US20080036005A1

公开(公告)日：2008-02-14

申请号：US11874129

申请日：2007-10-17

Applicant: Mark Armstrong ,  Gerhard Schrom ,  Sunit Tyagi ,  Paul Packan ,  Kelin Kuhn ,  Scott Thompson

Inventor： Mark Armstrong ,  Gerhard Schrom ,  Sunit Tyagi ,  Paul Packan ,  Kelin Kuhn ,  Scott Thompson

IPC: H01L29/76

CPC classification number: H01L27/1446 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/0922 ,  H01L29/045 ,  H01L29/7843 ,  H01L29/7846

Abstract: Complementary metal oxide semiconductor transistors are formed on a silicon substrate. The substrate has a {100} crystallographic orientation. The transistors are formed on the substrate so that current flows in the channels of the transistors are parallel to the direction. Additionally, longitudinal tensile stress is applied to the channels.

Abstract translation: 互补金属氧化物半导体晶体管形成在硅衬底上。 基板具有{100}晶体取向。 晶体管形成在衬底上，使得电流在晶体管的沟道中流动平行于<100>方向。 此外，纵向拉伸应力施加到通道。

公开(公告)号：US07312485B2

公开(公告)日：2007-12-25

申请号：US09727296

申请日：2000-11-29

Applicant: Mark Armstrong ,  Gerhard Schrom ,  Sunit Tyagi ,  Paul A. Packan ,  Kelin J. Kuhn ,  Scott Thompson

Inventor： Mark Armstrong ,  Gerhard Schrom ,  Sunit Tyagi ,  Paul A. Packan ,  Kelin J. Kuhn ,  Scott Thompson

IPC: H01L27/148 ,  H01L23/63 ,  H01L29/76 ,  H01L31/062 ,  H01L29/82

CPC classification number: H01L29/7846 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/78 ,  H01L29/7843

Abstract: Complementary metal oxide semiconductor transistors are formed on a silicon substrate. The substrate has a {100} crystallographic orientation. The transistors are formed on the substrate so that current flows in the channels of the transistors are parallel to the direction. Additionally, longitudinal tensile stress is applied to the channels.

Abstract translation: 互补金属氧化物半导体晶体管形成在硅衬底上。 基板具有{100}晶体取向。 晶体管形成在衬底上，使得电流在晶体管的沟道中流动平行于<100>方向。 此外，纵向拉伸应力施加到通道。