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    Switching amplifier having linear transition totem pole modulation
    24.
    发明授权
    Switching amplifier having linear transition totem pole modulation 有权

    公开(公告)号：US12034420B2

    公开(公告)日：2024-07-09

    申请号：US17491133

    申请日：2021-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Yinglai Xia ,  Yogesh Kumar Ramadass

    IPC: H03F3/217 ,  H03G3/34 ,  H03F1/02

    CPC classification number: H03G3/34 ,  H03F3/217 ,  H03F2200/03

    Abstract: A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.

    HYBRID MULTI-LEVEL INVERTER AND CHARGE PUMP
    25.
    发明申请
    HYBRID MULTI-LEVEL INVERTER AND CHARGE PUMP 有权

    公开(公告)号：US20230072847A1

    公开(公告)日：2023-03-09

    申请号：US17985190

    申请日：2022-11-11

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Orlando Lazaro ,  Yogesh Kumar Ramadass ,  Nan Xing

    IPC: H02M7/483 ,  H02M3/07

    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage from an input terminal of the power inverter. The capacitor has first and second terminals. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either: an output switch that selectively couples the output terminal to either the first terminal or the second terminal; or a set of input switches that selectively couple the first and second terminals to either the input terminal or a ground terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the output switch or the set of input switches.

    FOLDED RAMP GENERATOR
    26.
    发明申请
    FOLDED RAMP GENERATOR 有权

    公开(公告)号：US20220302908A1

    公开(公告)日：2022-09-22

    申请号：US17832280

    申请日：2022-06-03

    Applicant: Texas Instruments Incorporated

    Inventor： Yinglai Xia ,  Shailendra Kumar Baranwal ,  Yogesh Kumar Ramadass ,  Junmin Jiang

    IPC: H03K4/08 ,  H03L7/089 ,  H03L7/099 ,  H03F3/217 ,  H03L7/081

    Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.

    METHODS AND APPARATUS TO IMPROVE PERFORMANCE OF POWER PATH PROTECTION DEVICES
    28.
    发明申请
    METHODS AND APPARATUS TO IMPROVE PERFORMANCE OF POWER PATH PROTECTION DEVICES 有权

    公开(公告)号：US20210066909A1

    公开(公告)日：2021-03-04

    申请号：US17011522

    申请日：2020-09-03

    Applicant: Texas Instruments Incorporated

    Inventor： Yogesh Kumar Ramadass ,  Ujwal Radhakrishna ,  Jeffrey Morroni

    IPC: H02H7/20 ,  H01L23/525 ,  H03K17/687

    Abstract: An example integrated circuit includes: a substrate and a first metal fuse layer on the substrate, the first metal fuse layer having first and second electrical contacts, the first electrical contact adapted to be coupled to an input terminal, the second electrical contact adapted to be coupled to a diode. The example integrated circuit further includes a second metal fuse layer on the substrate, the second metal fuse layer having third and fourth electrical contacts, the third electrical contact coupled to the second electrical contact and adapted to be coupled to the diode, the fourth electrical contact coupled to a shunt circuit.

    Multilevel class-D power stage including a capacitive charge pump
    29.
    发明授权
    Multilevel class-D power stage including a capacitive charge pump 有权

    公开(公告)号：US10886881B2

    公开(公告)日：2021-01-05

    申请号：US16360703

    申请日：2019-03-21

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Yinglai Xia ,  Shailendra Kumar Baranwal ,  Junmin Jiang ,  Yogesh Kumar Ramadass

    IPC: H03F3/45 ,  H03F3/217 ,  H02M3/07

    Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.

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