公开(公告)号：US10515994B2

公开(公告)日：2019-12-24

申请号：US16148141

申请日：2018-10-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Tzu-Hsuan Hsu ,  Feng-Chi Hung ,  Min-Feng Kao

IPC: H01L27/146

Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.

公开(公告)号：US20190043912A1

公开(公告)日：2019-02-07

申请号：US16148141

申请日：2018-10-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Tzu-Hsuan Hsu ,  Feng-Chi Hung ,  Min-Feng Kao

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469

Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.

公开(公告)号：US20180277577A1

公开(公告)日：2018-09-27

申请号：US15996636

申请日：2018-06-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Wei Cheng ,  Horng Huei Tseng ,  Chao-Hsiung Wang ,  Chun-Hao Chou ,  Tsung-Han Tsai ,  Kuo-Cheng Lee ,  Tzu-Hsuan Hsu ,  Yung-Lung Hsu

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14685

Abstract: A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.

公开(公告)号：US09711560B2

公开(公告)日：2017-07-18

申请号：US14562424

申请日：2014-12-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsung-Han Tsai ,  Kun-Huei Lin ,  Chun-Hao Chou ,  Tzu-Hsuan Hsu ,  Ching-Chun Wang ,  Kuo-Cheng Lee ,  Yung-Lung Hsu

IPC: H01L27/146

CPC classification number: H01L27/14649 ,  H01L27/14607 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689

Abstract: A semiconductor device includes a substrate, light sensing devices, at least one infrared radiation sensing device, a transparent insulating layer, an infrared radiation cut layer, a color filter layer and an infrared radiation color filter layer. The light sensing devices and the at least one infrared radiation sensing device are disposed in the substrate and are adjacent to each other. The transparent insulating layer is disposed on the substrate overlying the light sensing devices and the at least one infrared radiation sensing device. The infrared radiation cut layer is disposed on the transparent insulating layer overlying the light sensing devices for filtering out infrared radiation and/or near infrared radiation. The color filter layer is disposed on the infrared radiation cut layer. The infrared radiation color filter layer is disposed on the transparent insulating layer overlying the at least one infrared radiation sensing device.

公开(公告)号：US12009214B2

公开(公告)日：2024-06-11

申请号：US17814691

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng Kao ,  Szu-Ying Chen ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Tzu-Hsuan Hsu ,  Feng-Chi Hung

IPC: H01L29/66 ,  H01L21/265 ,  H01L21/28 ,  H01L21/762 ,  H01L23/544 ,  H01L27/146 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L21/2652 ,  H01L21/28114 ,  H01L21/76229 ,  H01L23/544 ,  H01L27/14609 ,  H01L27/1464 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A device includes a semiconductor substrate, a gate dielectric over the semiconductor substrate, and a gate electrode over the gate dielectric. The gate electrode has a first portion having a first thickness, and a second portion having a second thickness smaller than the first thickness. The device further includes a source/drain region on a side of the gate electrode with the source/drain region extending into the semiconductor substrate, and a device isolation region. The device isolation region has a part having a sidewall contacting a second sidewall of the source/drain region to form an interface. The interface is overlapped by a joining line of the firs portion and the second portion of the gate electrode.

公开(公告)号：US11769781B2

公开(公告)日：2023-09-26

申请号：US17324373

申请日：2021-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jeng-Shyan Lin ,  Shu-Ting Tsai ,  Tzu-Hsuan Hsu

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/1463 ,  H01L27/14616 ,  H01L27/14627 ,  H01L27/14636

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a photodetector disposed in a semiconductor substrate. An interlayer dielectric (ILD) structure is disposed on a first side of the semiconductor substrate. A storage node is disposed in the semiconductor substrate and spaced from the photodetector, where the storage node is spaced from the first side by a first distance. A first isolation structure is disposed in the semiconductor substrate and between the photodetector and the storage node, where the first isolation structure extends into the semiconductor substrate from a second side of the semiconductor substrate that is opposite the first side, and where the first isolation structure is spaced from the first side by a second distance that is less than the first distance.

公开(公告)号：US20220359205A1

公开(公告)日：2022-11-10

申请号：US17814691

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng Kao ,  Szu-Ying Chen ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Tzu-Hsuan Hsu ,  Feng-Chi Hung

IPC: H01L21/265 ,  H01L21/762 ,  H01L21/28 ,  H01L29/423 ,  H01L23/544 ,  H01L29/66 ,  H01L29/78 ,  H01L27/146

Abstract: A device includes a semiconductor substrate, a gate dielectric over the semiconductor substrate, and a gate electrode over the gate dielectric. The gate electrode has a first portion having a first thickness, and a second portion having a second thickness smaller than the first thickness. The device further includes a source/drain region on a side of the gate electrode with the source/drain region extending into the semiconductor substrate, and a device isolation region. The device isolation region has a part having a sidewall contacting a second sidewall of the source/drain region to form an interface. The interface is overlapped by a joining line of the firs portion and the second portion of the gate electrode.

公开(公告)号：US20210193712A1

公开(公告)日：2021-06-24

申请号：US16805860

申请日：2020-03-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sin-Yao Huang ,  Feng-Chi Hung ,  Chen-Hsien Lin ,  Tzu-Hsuan Hsu ,  Yan-Chih Lu

IPC: H01L27/146

Abstract: A photosensing pixel includes a substrate, a photosensing region, a floating diffusion region, a transfer gate and a control electrode. The photosensing region is located within the substrate. The floating diffusion region is located within the substrate aside the photosensing region. The transfer gate is disposed on the substrate and extending into the photosensing region. The control electrode is located on the substrate and extending into the floating diffusion region.

公开(公告)号：US20200381465A1

公开(公告)日：2020-12-03

申请号：US16556654

申请日：2019-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jeng-Shyan Lin ,  Shu-Ting Tsai ,  Tzu-Hsuan Hsu

IPC: H01L27/146

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a photodetector disposed in a semiconductor substrate. An interlayer dielectric (ILD) structure is disposed on a first side of the semiconductor substrate. A storage node is disposed in the semiconductor substrate and spaced from the photodetector, where the storage node is spaced from the first side by a first distance. A first isolation structure is disposed in the semiconductor substrate and between the photodetector and the storage node, where the first isolation structure extends into the semiconductor substrate from a second side of the semiconductor substrate that is opposite the first side, and where the first isolation structure is spaced from the first side by a second distance that is less than the first distance.

公开(公告)号：US09991307B2

公开(公告)日：2018-06-05

申请号：US14713172

申请日：2015-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Wei Cheng ,  Horng Huei Tseng ,  Chao-Hsiung Wang ,  Chun-Hao Chou ,  Tsung-Han Tsai ,  Kuo-Cheng Lee ,  Tzu-Hsuan Hsu ,  Yung-Lung Hsu

IPC: H01L27/146 ,  H01L31/18 ,  H01L31/0232 ,  H04N9/04 ,  H04N5/335

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14685

Abstract: A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.